TC55V11601FT-15 ,16,777,216-WORD BY 1-BIT CMOS STATIC RAMTC55V11601FT-1516,777,216-WORD BY 1-BIT CMOS STATIC RAMThe TC55V11601FT is a 16,777,216-bit high sp ..
TC55V1403FT-15 ,4,194,304 WORD BY 1-BIT/1,048,576 WORD BY 4 BIT CMOS STATIC RAMTOSHIBA TC55V1403J/FT-15,-204,194,304-WORD BY 1-BlT/1,048,576-WORD BY 4-BIT CMOS STATIC RAMThe TC55 ..
TC55V16100FT-10 ,1,048,576-WORD BY 16-BIT CMOS STATIC RAMTOSHIBA TC55V161OOFT-10,-12,-151,048,576-WORD BY 16-BIT CMOS STATIC RAMThe TC55V16100FT is a 16,777 ..
TC55V16100FT-12 ,1,048,576-WORD BY 16-BIT CMOS STATIC RAMTOSHIBA TC55V161OOFT-10,-12,-151,048,576-WORD BY 16-BIT CMOS STATIC RAMThe TC55V16100FT is a 16,777 ..
TC55V16100FT-12 ,1,048,576-WORD BY 16-BIT CMOS STATIC RAMTOSHIBA TC55V161OOFT-10,-12,-151,048,576-WORD BY 16-BIT CMOS STATIC RAMThe TC55V16100FT is a 16,777 ..
TC55V16100FT-15 ,1,048,576-WORD BY 16-BIT CMOS STATIC RAMTOSHIBA TC55V161OOFT-10,-12,-151,048,576-WORD BY 16-BIT CMOS STATIC RAMThe TC55V16100FT is a 16,777 ..
TC9320F ,Frequency Counter System Microcontroller (DTS-10)
TC9320F-001 ,DDTS-1: DIGITAL TUNER SYSTEM
TC9322FB ,SINGLE CHIP DTS MICROCONTROLLER (DTS-21)features a built-in prescaler of operating 230MHz, PLLand LCD drivers.The CPU has 4bit parallel add ..
TC9322FB ,SINGLE CHIP DTS MICROCONTROLLER (DTS-21)Features built-in 1/3-duty, 1/2-bias LCD drivers and a built-in 3V booster circuit for the display. ..
TC9327AF ,DTS Microcontroller (DTS-21)Features a built-in 3-channel, 6-bit A/D converter. To prevent CPU malfunction, a built-in supply v ..
TC9327F ,DTS MICROCONTROLLERTC9327FT(‘QR77FDTS MICROCONTROLLER (DTS-21)The TC9327F is a 4-bit CMOS microcontroller forsingle-ch ..
TC55V11601FT-15
16,777,216-WORD BY 1-BIT CMOS STATIC RAM
TOSHIBA TC55V11601FT-15
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
16,777,216-WORD BY 1-BIT CMOS STATIC RAM
DESCRIPTION
The TC55V11601FT is a 16,7 7 7 ,216-bit high speed static random access memory (SRAM) organized as
16,777,216 words by 1 bit. Fabricated using CMOS technology and advanced circuit techniques to provide high
speed, it operates from a single 3.3 V power supply. Chip enable (Ci) can be used to place the device in a low-
power mode, and output enable (ttE) provides fast memory access. This device is well suited to cache memory
applications where high-speed access and high-speed storage are required. All inputs and outputs are isolated
and directly LVTTL compatible. The TC55V11601FT is available in a plastic 54-pin TSOP package with 400
mil width for high density surface assembly.
FEATURES
0 Fast access time (the following are maximum values) 0 Single power supply voltage of 3.3VK 0.3V
TC55V11601FT-15 : 15 ns 0 Fully static operation
0 Low-power dissipation o All inputs and outputs are LVTTL compatible
Cycle Time 15 30 ns 0 Separate data input and output
Operation (max) 200 130 mA 0 Output buffer control using CyE
tt Package:
Standby : 4mA(maX) TSOP H 54-P-400-0.80B (FT) (Weight : 0.55 g typ)
PlNASSK_iNMENT PINN_AMES
o A0 to A23 Address Inputs
NU2 1: 1 54 =1 NU2
VDD I: 2 53 = GND D Data Input
NU2 I: 3 52 = NU2 Q Data Output
NU2 1: 4 51 = NU2 - .
GND I: 5 50 = VDD CE Chip Enable Input
NU2 I: 6 49 = NU2 m Write Enable Input
A4 I: 7 48 = A5 -
A3 1: 8 47 = A6 OE Output Enable Input
fd g l (ll' 2 tl VDD Power (+ 3.3V)
A0 I 11 f, 44 = A9 GND Ground
AA: 12 - 43 = A_ZZ NU1, NU2 Not Usable
CE 1: 13 > 42 = OE
I/nn I: 14 41 = GND
WE = 15 tlL 40 = NU1
A23 I: 16 O 39 =1 A20
A19 1: 17 I; 38 = A10
A18 = 18 37 = A11
A17 = 19 36 = A12
A16 = 20 35 = A13
A15 I: 21 34 = A14
D l: 22 33 = Q
VOD I: 23 32 = GND
NU2 I: 24 31 = NU2
NU2 = 25 30 = NU2
GND I: 26 29 = va,
NU2 = 27 28 = NU2
000707EBA2
O TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction
or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA
products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a mal unction or
failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent
TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor
Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
0 The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office
equipment, measurina equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for
usage in equipment t at requires extraordinarily high quality and/or reliability or a malfunction or failure of which m.ay cause loss of human life or
bodily injury CUnintended Usage"). Unintended Usage include atomic ener y control instruments, airplane or spaceship instruments, transportation
instruments, traffic signal instruments, combustion control instruments, me ical instruments, all types of safety devices, etc.. Unintended Usage of
TOSHIBA products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade laws.
0 The information contained herein is presented only as a guide for the ap lications of our products. No responsibility is assumed by TOSHIBA
CORPORATION for any infringements of intellectual property or other rights 0 the third parties which may result from its use. No license is granted
b implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others.
0 The information contained herein is subject to change without notice.
2000-07-11 1/8
TOSHIBA TC55V11601FT-15
BLOCK DIAGRAM
o- MEMORY CELL
o- 1,m n: -
o- L’J: Lid ARRAY 4-o VDD
o- Mu. 8
'',=ii'tit gu 1,024x16,384 I GND
g=ri%z,,' SE - (16,777,216)
A9 t_lv
D c I\ COLUMN IIO
K CIRCUIT Q
COLUMN
f DECODER
.3: CE
< COLUMN
' i5 f, 4 ADDRESS BUFFER
a w tl,l,l,l,l,lll,l,l,l,l,ll
" A10 /\/ A23
E o $,
-ir- CE
MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.5 to 4.6 V
VIN Input Terminal Voltage - 0.5* to 4.6 V
VI/O Input/Output Terminal Voltage - 0.5* to VDD + 0.5** V
PD Power Dissipation 1.8 W
Tsolder Soldering Temperature (10 s) 260 ''C
Tstrg Storage Temperature - 65 to 150 "C
Topr Operating Temperature - 10 to 85 "C
: -1.5V with a pulse width of 20% .tRC min(4ns max)
: VDD+1.5V with a pulse width of 20% . tRC min (4ns max)
DC RECOMMENDED OPERATING CONDITIONS (Ta = 0° to 70''C)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDD Power Supply Voltage 3.0 3.3 3.6 V
" Input High Voltage 2.0 - VDD + 0.3** V
VlL Input Low Voltage - th3* - 0.8 V
: -1.0V with a pulse width of 20% . tRC min(4ns max)
: VDD+ 1.0V with a pulse width of 20% .tRC min(4ns max)
2000-07-1 1
TOSHIBA
TC55V11601FT-15
DC CHARACTERISTICS (Ta = (Y' to 70°C, VDD = 3.3V , 0.3V)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
l Input Leakage Current V =0 to V 1 1 A
IL (Except NU1 pin) IN" DD [1
E=V|H or W=V|L or E:\IIH
lLo Output Leakage Current Vour= 0 to VDD - 1 - 1 ,41A
. VIN = 0 to 0.8V -1 - 20
h(NUI) Input Current(NU1 pin) prA
V|N=O to 0.2V -1 - 1
IOH = - 2mA 2.4 - -
VOH Output High Voltage
lou-- -10OA VDo-0.2 - - v
IOL = 2mA - - 0.4
VOL Output Low Voltage
loL--100PA - - 0.2
TE-- VIL: Iout = 0mA tcycle =15ns - - 200
I DDO Operating Current OE = " mA
Other Inputs = VDD - 0.2V or 0.2V tcycle = 30ns - - 130
I DDS1 E: V|H, Other Inputs-- " or " - - 65
Stand by Cu rrent E = VDD - th2V mA
loose - - 4
Other lnputs=Voo- 0.2V or 0.2V
CAPACITANCE (Ta = 25°C,f = 1.0 MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
CIN Input Capacitance VIN = GND 6 pF
Cour Output Capacitance VOUT = GND 8 pF
Note: This parameter is periodically sampled and is not 100% tested.
OPERATING MODE
MODE 3 fl WE D Q POWER
Read L L H X Dout IDDO
Write L X L Din High-Z IDDO
Outputs Disable L H H X High-Z IDDO
Standby H x x x High-Z Ions
X : Don't care
Note: The NU1 and NU2 pins must be left unconnected or tied to GND or a voltage level of less
than 0.8 V. You must not apply a voltage of more than 0.8V to the NU1 and NU2.
2000-07-1 1
TOSHIBA
TC55V11601FT-15
AC CHARACTERISTICS (Ta = 0° to 70°C (Note 1), VDD = 3.3V i 0.3V)
READ CYCLE
TC55V11601FT-15
SYMBOL PARAMETER UNIT
MIN MAX
tRc Read Cycle Time 15 -
tACC Address Access Time - 15
tco Chip Enable Access Time - 15
tos Output Enable Access Time - 8
tOH Output Data Hold Time from Address Change 3 - ns
tcoe Output Enable Time from Chip Enable 3 -
tOEE Output Enable Time from Output Enable 1 -
tCOD Output Disable Time from Chip Enable - 8
tone Output Disable Time from Output Enable - 8
WRITE CYCLE
TC55V11601FT-15
SYMBOL PARAMETER UNIT
MIN MAX
twc Write Cycle Time 15 -
twp Write Pulse Width 10 -
tcw Chip Enable to End of Write 11 -
taw Address Valid to End of Write 11 -
tas Address Setup Time 0 -
tWR Write Recovery Time 0 - ns
tos Data Setup Time 8 -
tDH Data Hold Time 0 -
tOEW Output Enable Time from Write Enable 1 -
toow Output Disable Time from Write Enable - 8
AC TEST CONDITIONS Lig._1 3.3V
Input Pulse Level 3.0V/0.0V
Input Pulse Rise and Fall Time 2ns 1200Q
VD 20 = 500 IIOpin
Input Timing Measurement 1.5V
Reference Level RL = 509 CL = 5pF 8700
Output Timing Measurement 1.5V Cu = 30 'CC J;
Reference Level h-- 1.5V (For tcos, tom tcoo,
Output Load Fig. 1 tooo, tOEW and toDw)
2000-07-11 4/8
TOSHIBA
TIMING-GRAMS
TC55V11601FT-15
Lt1W.LtVIygl(seeiote2)
-"% tRc
ADDRESS X X
-"\ ACC ’ tOH
CE \ A"
tCOD (See Note 6)
I‘ tOE
tTi? "Rll" f /
tpEE (See Note 6) tooo (See Note 6)
Q VALID DATA OUT
tCOE (See Note 6)
INDETERMINATE
WRITE CYCLE 1 (W CONTROLLED) (See Note 5)
INDETERMINATE
_ twc A."
ADDRESS X X
tas twe twe
Wt? k "t 7/
L. tcw '
'tTil"" fix /
toow (See Note 6)
INDETERMINATE
tOEw (See Note 6)
(See Note 4)
INDETERMINATE
VALID DATA IN X
2000-07-11 5/8
TOSHIBA TC55V11601FT-15
WRITE CYCLE 2 (Cl CONTROLLED) (See Note 5)
4 twc _
ADDRESS X X
Us twp tWR
m _ if
-- S , f
CE l, R i
_ r , r LODW(See Note 6)
Q tCOE (See Note 6) ,
INDETERMINATE tos W
D VALID DATA IN
2000-07-11 6/8
TOSHIBA TC55V11601FT-15
Note: (1) Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400
linear feet per minute.
(mm remains HIGH for Read Cycle.
(3) If tTrif goes LOW coincident with or after 1Trfif goes LOW, the outputs will remain
at high impedance.
(4) If UE goes HIGH coincident with or before 1TrtT goes HIGH, the outputs will remain
at high impedance.
(5) If tTE is HIGH during the write cycle, the outputs will remain at high impedance.
(6) The parameters specified below are measured using the load shown in Fig. 1.
(A) tCOE, tOEE, tOEW ... ... ... ... Output Enable Time
(B) tCOD, t0D0, t0DW ... ... ... ... Output Disable Time
t 0.2V
Q th2V VALID DATA OUT
INDETERMINATE INDETERMINATEi 0.2V
2000-07-11 7/8
TOSHIBA TC55V11601FT-15
PACKAGE DIMENSIONS
Plastic TSOP (TSOPII 54-P-400-0.803)
Unit in mm
i'ipasrmummwuupspppssppi2i' -
IO.16:0.1 _‘ A
11.76 :02
tire""'?:.,,,,":).?,,,)),,',,,::,,?"""""),
0.71TYP L 1 Fa losztgjggm
1; 2222101 J, g ii
'i---' g l
Weight .' 0.559 (Typ)
2000-07-11 8/8
:
www.loq.com
.
