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TC5071PTOSHN/a5avaiC2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC5072PTOSHIBAN/a17avaiC2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC5072PTOSHIBA ?N/a20avaiC2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC


TC5072P ,C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC555 BCD OUT SEGMENT OUT DIGIT OUT (2°)(21)(22)(23) (MSD) (LSD) ABCD abcdefg D6D5D4D3D2Dl
TC5072P ,C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC555 BCD OUT SEGMENT OUT DIGIT OUT (2°)(21)(22)(23) (MSD) (LSD) ABCD abcdefg D6D5D4D3D2Dl
TC5081AP ,PHASE COMPARATORT051181 AP TENTATIVE PHASE COFPARATOR The TC5081AP consists of a digital phase comparator a ..
TC5081BP ,PHASE COMPARATORTC5081BPTrillion..The TC5081BP is phase comparator for PLL frequency I I cun+hnci7nr +unn annl rnn ..
TC5090AP ,CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHICFEATURES: . High precision .. i1 LSB MAX. V =5V . Low power consumption: 10mW(Typ.) @(fDD L ) . ..
TC5090AP. ,CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHICAPPLICATIONS: . Various control instruments (for temperature, humidity, pressure, etc.) . Home e ..
TC7W02 ,DUAL 2-INPUT NOR GATEFEATURES0 Hiah Sneed .....TC7W02 FUJVI U‘I _I.Ll_...------'"'"','luu _ _ ll 'Vcc=5VLow Power Dissip ..
TC7W02F ,DUAL 2-INPUT NOR GATELOGIC DIAGRAM TRUTH TABLE PIN ASSIGNMENT (TOP VIEW)(1)1A7A (5)"II1A El VCCC)c2B(6)(3)2Y2YiEl-, FIE” ..
TC7W02FK ,DUAL 2-INPUT NOR GATETC7W02F/FU/FKv,.DUAL 2-INPUT NOR GATEThe TC7W02 is a high speed C2MOS 2-INPUT NOR GATE I—ITC7WOZF'e ..
TC7W02FU ,DUAL 2-INPUT NOR GATETC7W02F/FU/FKv,.DUAL 2-INPUT NOR GATEThe TC7W02 is a high speed C2MOS 2-INPUT NOR GATE I—ITC7WOZF'e ..
TC7W04FK ,3 INVERTERS
TC7W04FK ,3 INVERTERS


TC5071P-TC5072P
C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
IILDUIUIi’, ILDUI IF,
T05072P il2)eijoelT,(e,-ljfjifcGRAT" CIRCUIT
TC5070P/TC5071P/TC5072P 6 DIGIT UNIVERSAL COUNTER
TC5070P/TC507lP/TC5072P are 6-digit universal counter
containing 6--digit memory register in addition to
functions of up/down counting, data presetting, zero
suppress, and latch.
The counted contents are output in BCD and seven
segment dynamically stepwise from most significant
digit in synchronization with input of SCAN.
The seven-segment output can directly drive the
common cathode type LED.
In addition to CARRY and ZERO outputs, these counter
are provided with EQUAL output, permitting a wide
range of applications such as for measuring
instruments, timers, etc.
Maximum counting value
TC507OP 999999 COUNTER
TC5071P 995959 TIMER
TC5072P 595999 TIMER
DIP42(6D42A-P)
ABSOLUTE MAXIMUM RATINGS
CHARACTERISTIC SYMBOL RATING UNIT
DC Supply Voltage VDD Vss-O.5-Vss+10 V
Input Voltage VIN VSS-0.r-VDD+0.5 V
Output Voltage VOUT 1lSS-0.5--vo0+0.5 V
DC Input Current IIN i10 mA
Power Dissipation PD 300 mu
Storage Temperature 0
Range Tstg -65 150 C
Lead Temp./Time Tsol 260°C . lOsec
PIN ASSIGNMENT
S E mEi SS
7l [42 MF ttac)
H (OH E403 H
I F-4 2H (2
= CJQ DC)
2 H mo (DIEl';"s A
B . mm 03:9 CI
0 >489 . -m cog
Q o m z 2 Q pa 2 a < =
sNs._t2.;a:;.tptP'" ‘c.ofVlieii2acDtrs'c.oooS? Q 3 B 5 E g S f? g 3 8 §
w‘r 2H N
cc2rI72d,tatort:yapti-qti)ZQ'HIN 'rCcooC3otel
> o: A ----" - o m---,---' m
a a e a
= :3 to = D:
me C) Mas
3° 8 as
m m cm
BCD OUT SEGMENT OUT DIGIT OUT
(2°)(21)(22)(23) (MSD) (LSD)
A B c D a b c d e f g
D6 D5134 D5 D2 D1
7 SEGMENT
DECODER,/DRIVER
MULTIPLEXER BLANKING
& STORE 6 DIGIT LATCH DIGIT COUNTER SCAN OSC SCAN &
COMPARATOR EQUAL
& UP/‘fiEWR
COUNT INHIBIT
& COUNT
6 DIGIT BCD
UP/DOWN COUNTER
6 DIGIT REGISTER
6 DIGIT MULTIPLEXER
6 DIGIT MULTIPLEXER
LOAD CA CB cc cn ' vss LOAD
RA RB RC RD VSS
(2°) (21>(22> <25)
REGISTER BCD IN
COUNTER (2°) (21) (22‘) (25)
COUNTER ECD IN
REGISTER
X Schmitt trigger inputs.
BLOCK DIAGRAM
T05070P, TC5071P, TC5022P
T05070P, T05071P, T05072P
DESCRIPTION OF PIN FUNCTION
PIN Nd. SYMBOL FUNCTION
1 NC No connection
2 VDD VDD power supply (3-811)
At "L" level, the digit counter is reset, and D6 (MSD) only
3 EET provide.
The Segment-out changes to the blanking state.
At "H" level, normal display operation.
II II .
4 £23 H No zero blanking
"L" Leading zero blanking in the higher order 5 digits.
7 C Each pin is seven segment output of 6-digit counter. The output
8 d is synchronized with the digit-out and is provided stepwise
9 e from the most significant digit.
12 A Each pin is BCD output of 6-digit counter. The output is
13 B synchronized with the digit-out and is provided stepwise from
the most significant digit.
14 C When SET input is at "L" level, the most significant digit data
15 D is provided.
"H" At positive edge of the STORE input, the contents of the
counter are latched.
16 STORE
"L" The contents of the counter are straight transferred to
the miltiplexer.
18 CC BCD input at the time when data are preset to the 6-digit
19 CB counter.
(With the LOAD COUNTER input at "H" level.)
At "H" level, the 6-digit counter is reset, and the contents of
21 RESET the counter become ALL "O".
ZERO output become at "H" level.
Auto scan oscillator is operated by connecting a capacitor
22 SCAN (2000-20000PF) between No.22 (SCAN) and No.23 (Vss) terminals.
External scan oscillator may also be used to drive the scan
input.
23 V88 GND (0V)
T85070P, TC5071P,TC5072P
DESCRIPTION OF PIN FUNCTION (Cont'd)
PIN No. SYMBOL FUNCTION
When the contents of the 6-digit register set by the input of
RA, RB, RC, and RD coincide with the contents of 6-digit
24 EQUAL counter, EQUAL output is provided at "H" level. Even if both
the contents coincide each other during setting by the inputs
of LOAD REGISTER and LOAD COUNTER, the output is inhibited and
"L" level remains unchanged.
25 Dl(LSD)
26 D2 These are the outputs to display the digits of segment out and
BCD-out.
27 D3 When SET input reaches "L" level, the digit counter is reset
28 Dh and D6 (MSD) only is provided. When SET input rises at "H"
level, the output is provided in the order of D5, D4...in
29 D5 synchronization with the SCAN clock.
30 D6(MSD)
31 LOAD-REGISTER "H" RA‘~RD input is set to 6-digit register.
(LOAD.R) "L" Write operation to the register is inhibited.
32 LOAD.C00NTER "H" CA-CD input is preset to the 6-digit counter.
(LOAD C) "L" Write operation to the counter is inhibited.
34 RC BCD input at the time when the data are set to the S-digit
35 RB register.
(With the LOAD REGISTER input at "H" level.)
lock in ut of 6-di it co nter
37 COUNT ?Counting at the pogitiveuedge of clock)
38 COUNT-INHIBIT "H" No counting
(C INH) "L" Counting
When the contents of counter have become "000000" at time of
up-counting, CARRY output is provided at "H" level during this
time from rise to fall of COUNT input.
39 CARRY When the contents of counter have become "999999" (for TC5070P)
"995959" (for TC5071P), and "595999" (for TC5072P) at time of
down-counting, CARRY output is also provided at "H" level
during this time from rise and fall of COUNT input.
When the contents of counter have become "00000", ZERO is
provided at "H" level.
40 ZERO During presetting by the LOAD COUNTER input, output operation
is inhibited and "L" level remains unchanged.
V "H" t.
" UP/DOWN Up coun
"L" Down count.
" NC No connection.
Telyi', TESO'IHIEWZI:
TIMING CHART
6 DIGIT COUNTER TIMING CHART (TCSOVOP); LOAD-C, LOAD.R--'L'
999998 999999 000000 000001 000000 999999 999998 '-riris1sisij-ti1y L, 000000
COUNT - I I TU L.) [LTL, L, L.l Ld U l..,
up/ DOWN l . I
C . INH I
ZERO l
EQUAL y'. i -i,
it. Register value is preset co 999998.
DIGIT COUNTER TIMING CHART
( (OX)
(EXTERNAL CLOCK
DGQMSD)
D1(LSD)
A _ D L) lomo‘x 1oAl(, 102 X7101] 1oill( 10‘ l 103 I 1o'fh101 r 105 J 10‘}:
a _ g E 105% 107% Id' a 102 H 101 E 10°E 105E lO‘E 105g 102g 101 E HZ 318% lo' E
HZ I High impedance. \Segment driver off.)
LOAD REGISTER, LOAD COUNTER TIMING CHART
Dn+l Dn Dn-l
SCAN w----sss,_,.,.,_b,,---ssss...._.se--'-sssss,
( (OX) y. : Timing where data is
(EXTERNAL CLOCK) I i I t I permitted tobe written at
the nth digit.
LOAD COUNTER, I I
LOAD REGISTER
m x ZTiming where data is written
BCD IN VALID at the nth digit.
L Timtn01,'r'r05071p, TtiN??'
OPERATING CONSIDERATION
1. COUNTER OPERATION
Counting is stepped by the rise of clock when the clock is added to COUNT input at
state of the inputs of LOAD-C, C-INH, and RESET at "L" level. At time of up-
counting, CARRY and ZERO outputs are "H" level at "000000", and at time of down-
counting, CARRY output is at "H" level at "999999" (for TC5070P), "995959" (for
TC5071P), and "595999: (for TC5072P). .'
When CARRY output is at "H" level, CARRY output remain at "H" leve until COUNT
input falls, even if RESET and LOAD.C inputs are changed to "H" level.
For COUNT and up/iii-Wi inputs is shaped schmitt trigger, COUNT and tJP/rTNhT inputs
rarely miscounts if waveform is not sharp.
2. COMPARATOR OPERATION
EQUAL output is provided at "H" level, when the contents of the counter coincide
with the comparator value set by LOAD-R input. However, even if they concide each
other during setting by LOAD-C and LOAD.R input, output operation is inhibited and
"L" level remains unchanged.
3. LOAD COUNTER AND LOAD REGISTER OPERATIONS
When the data required to preset the counter or when the comprating value is
required to set to the register, such operation is made by LOAD-C and LOAD.R input.
The presetting of data to the counter is acquired by setting LOAD-C input to "H"
level, synchronizing CA--CD input with the digit counter, and setting the digits
one after another. For the purpose, the external circuits are required for timing
of 06-s.01 output with CA--CD input. The comprator value can be set to the register
in the same way. Load register operation is independently of counting operation;
therfore, even during setting of the data to the register, counting can be
performed. (See an example of input setting circuits.)
(Note) that normal operation is not acquired when the data exceeding the maximum
counting value (for each digit) shown on page 1 for the individual items are set
to the counter and register.
4. LATCH OPERATION
At STORE input is at "L" level, the contents of counter are straight transferred
to the multiplexer, and the output indicates the contents of counter.
At STORE input is at "H" level, the indicating output remains unchanged although
the count varies for the contents of counter are latched at the positive edge of
Ttmi)70P/rim071p,'rtyiAy
OPERATING CONSIDERATION (Cont'd)
STORE input. When STORE is turned to "L" level, the contents of counter at that
time are provided. STORE input shape schmitt trigger.
DISPLAY OPERATION
At E23 input is at "L" level, the higher' order 5 digits of SEGMENT-OUT output are
changed to the state of leading zero blanking. '
At "H" level, the function of leading zero blanking is released.
At Tiyi input is at "L" level, the SEGMENT-OUT output is changed to the state of
blanking, and the digit counter is reset, and D6 (MSD) only is provided. At that
time, the BCD-OUT output provided the data of the 6th digit. At "H" level, the
DHHT-0UT output provided in the order of D6, D5, D4, ... in synchronization with
SCAN, and SEGMENT-OUT and CD-OUT output are also provided in synchronization.
Segment Display Format (Common Cathod type LEO)
0 l 2 3 l 5
Ct I Ct -1 I I C t I
I I I I_ _I I Ll LY I Cl _I l_
SCANNING OPERATION
AUTO SCAN operation can be performed by inserting a capacitor between the terminal
SCAN and the terminal Vss. By adding an external clock to the terminal SCAN,
MANUAL SCAN operation can be performed.
SCAN OSC actuates the digit counter, arid at the AUTO SCAN operation, the digit
blanking is applied to each DIGIT OUT for the T/150 period of one cycle (T) of
SCAN OSC, therfore, can be prevented overlap of each DIGIT OUT. One cycle of
DIGIT OUT is equal to 6 cycles of SCAN OSC.
SCAN signal synchronize with data signal setting by the LOAD REGISTER and/or LOAD
COUNTER inputs. An external capacitor of 2000 to 20000pF is required for SCAN
(Note) BCD-OUT output may involve some hazards at the change of COUNT input and
DIGIT-OUT output; However, such hazards do not hinder operation because
they occur during the blanking hours for DI(HT-OU'r and SEOfENT-00T output.
OPERATING CONSIDERATION (Cont‘d)
TC5070P, T05071P, T85072P
SCAN OSC
D ABLANKING
fosc=:ff (Hz) rTyp.§ zst
-----VN
D-BLANKING
CX (pF) DIGIT OUT (us)
RECOMMENDED OPERATING CONDITIONS (VSS=OV)
CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
DC Supply Voltage VDD 3 - 8 ll
Input Voltage VIN 0 - VDD V
Operating Temperature - - o
Range Topr 40 85 C
TC5070P, TC5071P, TC5072P
STATIC ELECTRICAL CHARACTERISTICS (VSS=OV)
CHARACTERISTIC iss/of- ESSEITION VDD 40 C 25 C 85 C UNIT
(V) MIN. MAX MIN. TYP. MAX MIN. MAX.
$:%:;::vel Output irouTleLtA
(Except SEGMENT VOH VIN=VSS,VDD 5 4.95 - 4.95 5.00 - 4.95 -
OUTPUT)
11/:iCC,e1 Output i1ouTl(Except SEGMENT VOL VIN=VSS,VDD 5 - 0.05 - 0.00 0.05 - 0.05 V
OUTPUT)
High-Level Output -
Voltage VOH IIOUT"‘1“A 5 4.0 - 4.0 4.5 - 4.0 -
(SEGMENT OUTPUT) VIN=VSS9VDD
Output High Current V0H=4.6V
I - . - - . - . - - . -
(A-D, IN, CA, ZE 0H VIN=VSS’VDD 5 O 2 0 l6 0 8 0 12
OUTPUT)
Output High Current V0H=4.2V
(D1--06 OUTPUT) IoH VIN=VSs,VDD 5 -0.75 - .-0.7 -1.5 - -0.6 -
Output Low Current VOL=0.4V
(Except SEGMENT IOL - 5 0.52 - 0.44 1.2 - 0.36 -
Output High Current V0H=3.5V
-2 - -2 - - -2 -
(SEGMENT OUTPUT) 10" V1N=VSS,VDD 5 5 5 50 0
Input Low Voltage VOH=4-OV
(Except Schmitt VIH VOL=0.5V 5 3.5 - 3.5 2.75 - 3.5 -
Trigger Input) IIOUTI<:14A
Input High Voltage VOH=4'OV
(Except Schmitt VIL v0L=0.5v 5 - 1.5 - 2.15 1.5 - 1.5
Trigger Input) IIOUTI<:1uA
High-Level Input
Current
(Except Pull Up/ 11H V1H=8V 8 - 0.3 - 10-5 0.3 - 1.0 4A
Down Resistance
Input)
TC5070P, TCSO71P, TC5072P
STATIC ELECTRICAL CHARACTERISTICS (Vss=0V)
CHARACTERISTIC SYM- TEST VDD 40 C 25 C 85 C UNIT
BOL CONDITION (V) MIN. MAX. MIN. TYP. MAX. MIN. MAX.
Low-Level Input
Current
(Except Pull Up/ IIL V1L=OV 8 - -0.3 - 10-5 -0.3 - -1.0
Down Resistance
Input)
High-Level Input
Current IIH VIH=8V 8 - 5.0 - - 5.0 - 5.0
(rii5 IN)
Low-Level Input
Current
IIL V1L=OV 8 - -180 - -70 -160 - -140 gsA
(SET IN)
High-Level Input
Current
(CA-CD, RA-RD, IIH VIH=8V 8 - 180 - 80 160 - 140
SCAN IN)
Low-Level Input
Current 8
IIL V1L=0V - --5 0 - - -5.0 - -5 0
(CA-CD, RA--RD IN)
E0“;Le:91 Input 5 - -2.3 - -1.0 -2.0 - -1.8
ur en IIL V1L=OV mA
(SCAN IN) 8 - -3.6 - -1.6 -3.2 - -2.8
Output Leakage
Current IDL V0L=0V 8 wr- ..-3.0 - -10-4 -3.0 - -1.5 uA
(SEGMENT OUT)
. t D . SCAN=VDD 5 - 75o - 180 500 - 1000
2::::::“ EVICE IDD SET, CA-CD, #A
RAf‘RD OPEN 8 - 1500 - 250 1000 - 2000
TC5070P, TC5071P, TC5072P
DYNAMIC ELECTRICAL CHARACTERISTICS (Ta=25°C, VDD=5.OV, Vss=0V, CL=50pF)
CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
Output Transition Time tTLH SEGMENT OUT (RL=1ki2) - 70 200
(Low to High) tTLH OTHER OUT - 100 400
Output Transition Time
(High to Low) tTHL Except SEGMENT OUT - 70 200
COUNT-BCD, SEGMENT OUT
tpLH, tpHL C00NT-CARRY OUT - 150 400
Propagation Delay Time tpLH, tpHL COUNT-ZERO OUT - 200 400 ns
tpLH, tpHL C00NT-EWAL OUT - 270 500
tpLH, tpHL SCAN-DIGIT OUT - 250 500
tpLH, tpHL SCAN-BCD OUT - 750 1500
Propagation Delay Time tpLH SCAN-SEOMENT OUT (RL=1ktl) - 500 1000
tpHL SCAN-SEGMENT OUT (RL=lkn) - 300 700
f -1 -
CL COUNT IN x. 4.0
Max. Clock Frequency fcc-2 1.6 - MHz
fCL SCAN IN 0.5 1.0 -
Min. Pulse Width tw RESET IN - 250 500
tw STORE IN - 80 160
tst) C00NT-STORE - 70 150
tSU COUNT-tJP/Dot - 230 500
Min. Set-up Time tso STORE-CLEAR - 130 300
tSU COUNT-C." - 0 100
tSU SCAN IN-LOAD-C, LOAD-R v -tio 50 ns
tsu SCAN IN-BCDIN - 200 450
cH CotJNT-tJP/DoUN - 40 150
Min. Hold Time tH SCAN IN-LOAD-C, LOAD-R - 70 200
tH SCAN IN-BCDIN .- 140 300
Min. Removal Time trem COUNT-RESET - 60 150
Max. Input Rise/Fall trCL fg,t1" SchirTCtt Trigger 20 - -
Time Except Schmifl Trigger ps
trCL Input 20 - -
Positive Trigger 3 0 l 0
Threshold Voltage VP - . .
Negative Trigger V l 0 l 8 - V
Threshold Voltage N . .
Hysteresis Voltage VB 0.5 1.2 -
T05070P, T05071P,TC5072P
DYNAMIC ELECTRICAL CAHRACTERISTICS (Ta=25°C, VDD=5.OV, Vss=OV, CL=50pF)
CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX, UNIT
Quiescent Device Current IDD COUNT IN = H 6 L - 250 - ttA
(cx=2000-20000pF) COUNT IN = 1 MHz - 650 -
Input Capacitance Cm Except SCAN IN - 5.0 7.5 pF
* The count operation can respond as far as fcL-1, and CARRY, EQUAL, and ZERO outputs
can respond as far as fcL-2.
NAVEFORMS FOR MEASUREMENT OF DYNAMIC CHARACTERISTICS
WAVEFORM l
COUNT rirssiovT''sss_vt 50% " 50% 1 50% 50%
ZERO OUT 1150% "rs
- ' tpLH t pHL "
EQUAL OUT /' I50%
4 tpW tpHL- tpHL
CARRY OUT 50% 50%
_ t pLH
a NE OUT 3/0
- tpHL -
a N D (DOT N
-lr-----
WAVEFORMVZ
SCAN Jon ,t 50% N 50%
D1 _ D6 OUT 15507"
A _ D OUT 50% 50%
--r-.--------r- t LH tPHL .
a _ g OUT 50% 50% k
ItpHL , tpLH
WAVEFORM 3
COUNT , 50% /s'iir7"ssc_y''esrrrrNc._/ 50 %
UP/ DOT-gy- 50% 50%
tH tsu
C . I NH -- ------- W
tw ---.-
STORE 50% 50% 50%
Dr--- tsu
tpt -----
RES ET 50 % ( 5O "
t S U t r e m
TC5070P, T05071P, T05072P
WAVEFORMS FOR MEASUREMENT OF DYNAMIC CHARACTERISTICS
WAVEFORM 4
SCAN -,,//-"'-httso_ro-/"'"'-"1si:socro_,,/'-'''-
LOAD . C , K 50% NK50%
LOAD-R /
50% 50%
BCD IN
tsu tH tSU tn
' Output tr and tf .. note the output change time during lO~90$ of Vout.
TYPICAL INPUT SELECT CIRCUIT
C) IN CASE OF DATA PRESETTING WITH DIGITAL SWITCH,ETC.
DIGIT OUT Ds D5 DI D3 De D1
CB -,_li_CssrNl"-'s,
CC I N l \ I \
TC507OP
ck. In case of presetting 569723
(2) IN CASE OF DATA PRESETTING WITH MICRO-COMPUTER,ETC.
m "n.-,]
SET SCAN D6 D6 'l 4 I Da D1
- I 1 I I
T0507OP CPU LOAD-C I l I I I I
LOAD~C
CA~CD 6 a G Cr)", a 9
CC te, In case of presettlng 569723
TC5070P, T05071P, T05072P
APPLICATION CIRCUIT
TLR312 X 6
SV m405OBP TCGZOOSP
UP/DOWN D6
CDNCA RD~RA SCAN
I'""" (CERAMIC CAPAC TTOR)
VDD ' s v 181588
Vss = o v DIGITAL-SW

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