TC5027BP ,BINARY COUNTERCZMOS DIGITAL INTEGRATED CIRCUIT
SILICON MONOLITHIC
TC5027BP BINARY COUNTER
TC5027BP is four b ..
TC5036AP ,17-Stage High Speed Frequency DividerCZMOS DIGITAL INTEGRATED CIRCUIT
SILICON M0N0LlTHIC
TC5036AP TC5048AP 17-STAGE HIGH SPEED FRE ..
TC5036P ,17-stage high speed frequency dividerBLOCK DIAGRAM
(x-a-,
VDD2 Rf
XT
Irss2
RESET o------
- L -
12 R:2ookn I
L,
TI ..
TC5043P ,C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHICFEATURES:
. Wide time range of timer (5ms--1500Hr)
. Wide range of fine adjustment of oscilla ..
TC5048AP ,17-Stage High Speed Frequency DividerABSOLUTE MAXIMUM RATINGS
TRUTH TABLE
CHRACTERISTIC SYMBOL RATING UNIT
VDDl v s -0.5ruv +10
..
TC5048P ,17-stage high speed frequency dividerCZMOS DIGITAL INTEGRATED CIRCUIT
SILICON M0N0LlTHIC
TC5036AP TC5048AP 17-STAGE HIGH SPEED FRE ..
TC7SZ14F ,Schmitt InverterFeatures TC7SZ14F High output drive: ±24 mA (min) @V = 3 V CC High speed: t = 3.7 ns (typ.) @ ..
TC7SZ14FU ,Schmitt InverterLogic Diagram Truth Table A Y IN A OUT YL H H L Recommended Operating Conditions Characteristics S ..
TC7SZ17F ,L-MOS SHS series (TC74LCX-equivalent)Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating UnitPin Assignment (top view)Sup ..
TC7SZ17FE ,L-MOS SHS series (TC74LCX-equivalent)Electrical Characteristics DC Characteristics Ta = 25°C Ta = −40 to 85°CCharacteristics Symbol Tes ..
TC7SZ32AFE ,2 Input OR GateFeatures High output drive: ±24 mA (typ.) @V = 3 V CC Super high speed operation: t 2.4 ns ..
TC7SZ32AFS ,L-MOS SHS series (TC74LCX-equivalent)absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon r ..
TC5027BP
BINARY COUNTER
CZMOS DIGITAL INTEGRATED CIRCUIT
SILICON MONOLITHIC
TC5027BP BINARY COUNTER
TGSQZWPL
clock.
TC5027BP is four bit binary up counter with the reset
function and since the clock for the first stage is
independent from the clock for the second through
the fourth stages, this can be used as binary, octal
or hexadecimal counter/divider.
When two inputs of RESET(O) are set to "H", the
content of counter is reset to O regardless of the
The outputs change their states at the
falling edge of count inputs (INA, INB).
ABSOLUTE MAXIMUM RATINGS
OIPr1fsDItA--P)
PIN ASSIGNMENT
CHARACTERISTIC SYMBOL RATING UNIT
DC Supply Voltage VDD VSS-0.5-VSS+20
Input Voltage VIN vssp-0.rs-vIoD+0.5
Output Voltage VOUT Vss-0.r-1%o+0.5
DC Input Current IIN ilO
Power Dissipation PD 300
Storage Temperature - _
Range Tstg 65 150
Lead Temp./Time Tsol 260°C . lOsec
LOGIC DIAGRAM
Rp, QB QC QD
D q J Cl-' I " q
INA C CL F'CCL --'CCL
R K R l )K R
@539 0%
2 - INA " - 10
9 L INB QB - 11
5 --"Ro(1) QC F 12 VDD; It
6 --Roie) QD b-- IG vss ; '7
NC ; 1,3
TRUTH TABLE
RESET/COUNT MUDE
INPUTS OUTPUT
INA , INB Ron) Rua My CIC, QB QA
Cy H H L L L L
l L ew.. COUNT
-L, 4. L COUNT
'9 Don't ware V
COUNT MODE A COUNT MODE B
COUNT OUTPUTS COUNT OUTPUTS
NO. 2D ac QB NO. QD v, QB CIA
0 L L L O L L L L
1 L L l L L L H
2 L H L 2 L L H L
3 L H H 3 L L H H
l H L L 4 L H L L
5 H L H 5 L H L H
6 H H L 6 L H H L
7 H H H '7 L H H H
8 H L L L
A; Separate 9 H L L H
10 H L H L
Bi LNB Should 11 H L H H
be connected
to 2A. 12 H H L L
13 H H L H
14 H H H L
15 H H H H
T65027BP
RECOMMENDED OPERATING CONDITIONS (Vss=0V)
CHARACTERISTIC SYMBOL MIN. TYP. MAX. UNIT
Supply Voltage VDD 3 - 18 V
Input Voltage VIN 0 - VDD V
Operating Temp. Topr -40 - 85 "c
TLECTRICAL CHALAFTERISTICS (Vss=0V)
-40°c 2 "C th
CHARACTERISTIC SYMBOI.TEST CONDITIONS VDD 5 85 C UNIT
(v) MIN. MAX. MIN. TYP. MAX. MIN. MAX.
- . . - 4.95 -
High Level 'IOUT'
Von ll = ll v 10 9.95 - 9.95 10.00 - 9.95 -
Output Voltage IN ss, DD 15 14.95 - 14.95 15,00 - 14.95 - V
LowLevel vo/iumri<::cusit 3: 35: 3032:35
Output Voltage VIN = VSS’VDD 15 - 0.05 - 0.00 0.05 - 0.05
VOH = 4.6V 5 -0.2 - -0.l6 - -0.12 -
High Level 10H Vou = 9.5V 10 -0.5 - -0.4 - --0.3 -
Output Current _ Von = 13.5v 15 -1.4 - -1.2 - -1.0 -
VIN = VSS,VDD
VOL = 0.4V 5 0.52 - 0.44 - 0.36 - mA
Low Level Toi, VOL = 0.5V 10 1.3 - 1.1 - 0.9 -
Output Current VOL = 1.5V 15 3 6 - 3.0 - 2.4 -
VIN = Vss,VDD
1ro0r=0.5v,4.5v 5 3.5 - 3.5 2.75 - 3.5 -
High Level tnput VIH VOUT=1.OV,9.OV 10 7.0 - 7 0 5.5 - 7.0 -
Voltage 1l0iJT---1.5V,13.5V 15 11.0 - 11.0 8.25 - 11.0 -
IIOUT|1lotJT--0.51l,4.5lr 5 - 1.5 - 2.25 1.5 - 1.5 V
Low Level VIL VOUT=1.0V,9.0V 1o - 3.0 - .5 3.0 3.0
Input Voltage 1loUT--1.51l,13.51l 15 - 4.0 - 6.75 4.0 - 4.0
‘IOUT’<:LuA
Input "H" Level 11H VIH = 18V 18 - 0.3 - 10-5 0.3 - 1.0
Current "L" Level Til. VIL = 0V 18 - -0.3 - -10-5 10.3 - -1.0 ph
. 5 - 20 - 0.005 20 - 150
Qu1escent IDD =
Supply Current VEN Vss,VDD 10 - 40 - 0.010 40 - 300 ph
15 - 80 - 0.015 80 - 600
*All valid inputcombinations
SWITCHING CHARACTERISTICS (Ta=25°c. VSS=OV. CL=SODF)
CHARACTERISTIC SYMBOL TEST CONDITIONS YD? MIN. TYP. MAX. UNIT
5 - 130 400
Output Rise Time tTLH 10 - 65 200
15 - 50 160
5 - 100 200
Output Fall Time tTHL 10 - 50 100
15 - 40 80
TC5027BP
SWITCHING CHARACTERISTICS (Ta=25°C, V =OV, CL=50PF)
CHARACTERISTIC SYMBOL TEST
CONDITIONS VDD MIN. TYP. MAX. UNIT
(Low-High) Propagation t LH 5 - 340 750
Delay Time p 10 - 160 350
(INA, INB - Q) 15 - 130 280
(High-Low) Propagation t 5 - 310 650 ns
Delay Time PHL 10 - 150 330
(INAJNB - Q) 15 - 120 250
(High-Low) Propagatio t 5 - 250 700
Delay Time _ pHL , 10 - 120 300 ns
(R0 - Q1 15 - 100 250
Max. Clock Rise Time trCL 5 20 - -
Max. Clock Fall Time thL 10 2.5 - - #5
15 1.0 - -
Max. Clock Frequency 5 0.8 1.2 -
(INA, INB) fCL 10 1.5 2.5 - MHz
15 2.0 3.2 -
Min. Reset Pulse tw 5 - 250 500
Width 10 - 110 200 ns
(RESET) 15 - 80 150
Input Capacitance CT - 5 - PF
SWITCHING TIME TEST CIRCUITS
s . - . -
TE T CIRCUIT 1 tpLH’ tpHL (INA,INB Q) TEST CIRCUIT 2 tpHL (R0 Q), tw
u VDD 2
.P.C. * IN 0 P.G.l NA QA
u,-, INA A IN Q
B li-o -"'-H B QB _0
ion) (rr--ao 1 0(1) (ie-e
0(2) A] o P.C.2' R0(2) D-o
c =50 F
v L P =
ss l i vss ch SOPF
SWITCHING TIME TEST WAVEFORMS
* PULSE GENERATOR
WAVEFORM 1. tpLH, TpHL (INA, INB-a), fCL
20ns 20ns
--------- vss
tTLH ., -t-'- tTHL V
907. ' , 907, 011
Q m Q 50% 507,
A D W. .
102 c-1ird-----voi,
_ H --e
TC5027BP
SWITCHING TIME TEST WAVEFORMS
WAVEFORM 2. tpHL (R0 - a), tw ,
20ns 20ns
907, Jr VDD
log,' l
20ns 20ns 20ns 20ns
RO(l)'R0(2)
QA m QD
tTLH t HL t HL
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