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OP177AZ-OP177BZ-OP177EZ-OP177FP-OP177FS Fast Delivery,Good Price
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OP177AZADN/a7avaiUltraprecision Operational Amplifier
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OP177GP ,Ultraprecision Operational AmplifierSpecifications subject to change without notice.(@ V = 615 V, –55°C ≤ T ≤ +1258C, unless otherwise ..
OP177GS ,Ultraprecision Operational AmplifierSpecifications subject to change without notice.–2–REV. BOP177(@ V = 615 V, T = +258C, unless other ..
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P28F001BX-T150 , 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
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P28F001BX-T150 , 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
P28F001BX-T150 , 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
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OP177AZ-OP177BZ-OP177EZ-OP177FP-OP177FS-OP177FZ-OP177GP-OP177GS-OP177GZ
Ultraprecision Operational Amplifier
PIN CONNECTIONS
REV.BUltraprecision
Operational Amplifier
FEATURES
Ultralow Offset Voltage:
TA = +258C: 10 mV max
–558C ≤ TA ≤ +1258C: 20 mV max
Outstanding Offset Voltage Drift: 0.1 mV/8C max
Excellent Open-Loop Gain and Gain Linearity:
12 V/mV typ
CMRR: 130 dB min
PSRR: 120 dB min
Low Supply Current: 2.0 mA max
Fits Industry Standard Precision Op Amp Sockets
(OP07/OP77)
GENERAL DESCRIPTION

The OP177 features the highest precision performance of any
op amp currently available. Offset voltage of the OP177 is only
10 μV max at room temperature and 20 μV max over the full
military temperature range of –55°C to +125°C. The ultralow
VOS of the OP177, combines with its exceptional offset voltage
drift (TCVOS) of 0.1 μV/°C max, to eliminate the need for
external VOS adjustment and increases system accuracy over
temperature.
The OP177’s open-loop gain of 12 V/μV is maintained over the
full ±10 V output range. CMRR of 130 dB min, PSRR of
120 dB min, and maximum supply current of 2 mA are just a
few examples of the excellent performance of this operational
amplifier. The OP177’s combination of outstanding specifications
insure accurate performance in high closed-loop gain applications.
This low noise bipolar input op amp is also a cost effective
alternative to chopper-stabilized amplifiers. The OP177 provides
chopper-type performance without the usual problems of high
noise, low frequency chopper spikes, large physical size, limited
common-mode input voltage range, and bulky external storage
capacitors.
The OP177 is offered in both the –55°C to +125°C military,
and the –40°C to +85°C extended industrial temperature
ranges. This product is available in 8-pin ceramic and epoxy
DIPs, as well as the space saving 8-pin Small-Outline (SO) and
the Leadless Chip Carrier (LCC) packages.
Figure 1.Simplified Schematic
Epoxy Mini-DIP
(P Suffix)
8-Pin Hermetic DIP
(Z-Suffix)
8-Pin SO
(S-Suffix)
NC = NO CONNECT
OP177BRC/883
LCC (RC Suffix)
NOTESLong-Term Input Offset Voltage Stability refers to the averaged trend line of VOS vs. Time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in VOS during the first 30 operating days are typically less than 2.0 μV.Sample tested.Guaranteed by design.Guaranteed by CMRR test condition.To insure high open-loop gain throughout the ±10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤VO ≤ +10 V.
Specifications subject to change without notice.
OP177–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS(@ VS = 615 V, TA = +258C, unless otherwise noted)
ELECTRICAL CHARACTERISTICS

NOTESTCVOS is 100% tested.Guaranteed by endpoint limits.Guaranteed by CMRR test condition.To insure high open-loop gain throughout the ±10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤VO ≤ +10 V.
Specifications subject to change without notice.
(@ VS = 615 V, –55°C ≤ TA ≤ +1258C, unless otherwise noted)
OP177
NOTESLong-Term Input Offset Voltage Stability refers to the averaged trend line of VOS vs. time over extended periods after the first 30 days of operation. Excluding the ini-
tial hour of operation, changes in VOS during the first 30 operating days are typically less than 2.0 μV.Sample tested.Guaranteed by design.Guaranteed by CMRR test condition.To insure high open-loop gain throughout the ±10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤VO ≤ +10 V.
Specifications subject to change without notice.
ELECTRICAL CHARACTERISTICS(@ VS = 615 V, TA = +258C, unless otherwise noted)
OP177–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS

NOTESOP177E: TCVOS is 100% tested.Guaranteed by endpoint limits.Guaranteed by CMRR test condition.To insure high open-loop gain throughout the ±10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤VO ≤ +10 V.
Specifications subject to change without notice.
Figure 2.Typical Offset Voltage Test Circuit
Figure 3.Optional Offset Nulling Circuit
(@ VS = 615 V, –40°C ≤ TA ≤ +858C, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Internal Power Dissipation1 . . . . . . . . . . . . . . . . . . .500 mW
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ±30 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
Z and RC Packages . . . . . . . . . . . . . . . . . –65°C to +150°C
S, P Package . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range
OP177A, OP177B . . . . . . . . . . . . . . . . . –55°C to +125°C
OP177E, OP177F, OP177G . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . +300°C
DICE Junction Temperature (TJ) . . . . . . . –65°C to +150°C
NOTESFor supply voltages less than ±22 V, the absolute maximum input voltage is equal
to the supply voltage.θJA is specified for worst case mounting conditions, i.e., θJA is specified for
device in socket for cerdip, P-DIP, and LCC packages; θJA is specified for
device soldered to printed circuit board for SO package.
Figure 4.Burn-In Circuit
ORDERING GUIDE
OP177–Typical Performance Characteristics
Figure 6.Power Consumption vs.
Power Supply
Figure 9.Open-Loop Gain
vs. Temperature
Figure 12.Input Offset Current
vs. Temperature
Figure 7.Warm-Up VOS Drift
(Normalized) Z Package
Figure 10.Open-Loop Gain vs.
Power Supply Voltage
Figure 13.Closed-Loop Response
for Various Gain Configurations
Figure 5.Gain Linearity (Input
Voltage vs. Output Voltage)
Figure 8.Offset Voltage Change
Due to Thermal Shock
Figure 11.Input Bias Current
vs. Temperature
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