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OP07CPZADIN/a9334avaiUltralow Offset Voltage Operational Amplifier
OP07CS-REEL |OP07CSREELADN/a2500avaiUltralow Offset Voltage Operational Amplifier
OP07CS-REEL7 |OP07CSREEL7ADN/a60avaiUltralow Offset Voltage Operational Amplifier
OP07CSZADIN/a9335avaiUltralow Offset Voltage Operational Amplifier
OP07CSZ-REEL |OP07CSZREELADN/a5000avaiUltralow Offset Voltage Operational Amplifier
OP07CSZ-REEL |OP07CSZREELPb-freeN/a492avaiUltralow Offset Voltage Operational Amplifier


OP07CSZ ,Ultralow Offset Voltage Operational AmplifierFEATURESLow V : 75 V MaxOS8-Lead PDIP (P-Suffix)Low V Drift: 1.3 V/C MaxOS8-Lead SOIC (S-Suffix) ..
OP07CSZ-REEL ,Ultralow Offset Voltage Operational AmplifierCHARACTERISTICSOutput Voltage Swing V R ≥ 10 kΩ± 12.5 ±13.0 VO LR ≥ 2 kΩ± 12.0 ±12.8 VLR ≥ 1 kΩ± 10 ..
OP07CSZ-REEL ,Ultralow Offset Voltage Operational AmplifierCHARACTERISTICS1Input Offset Voltage V 30 75 µVOS2Long-Term V Stability V /Time 0.3 1.5 µV/MoOS OSI ..
OP07CZ ,Ultralow Offset Voltage Dual Operational Amplifierfeatures low input bias cur- rent (i2nA for OP-07A) and high open-loop gain (300WmVfor OP-07A). T ..
OP07D ,Ultralow Offset Voltage Operational AmplifierMaximum Ratings.. 412.1 Layout Guidelines.... 117.2 Handling Ratings. 412.2 Layout Example....... 1 ..
OP-07D ,Ultralow Offset Voltage Operational AmplifierSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareOP07C,OP07DSLOS099G– ..
P2600E , TO-92 SIDACtor solid state protection devices protect telecommunications equipment such
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OP07CPZ-OP07CS-REEL-OP07CS-REEL7-OP07CSZ-OP07CSZ-REEL
Ultralow Offset Voltage Operational Amplifier
REV.C
Ultralow Offset Voltage
Operational Amplifier
FEATURES
Low VOS: 75 �V Max
Low VOS Drift: 1.3 �V/�C Max
Ultrastable vs. Time: 1.5 �V/Month Max
Low Noise: 0.6 �V p-p Max
Wide Input Voltage Range: �14 V
Wide Supply Voltage Range: 3 V to 18 V
Fits 725,108A/308A, 741, AD510 Sockets
125�C Temperature-Tested Dice
APPLICATIONS
Wireless Base Station Control Circuits
Optical Network Control Circuits
Instrumentation
Sensors and Controls
Thermocouples
RTDs
Strain Bridges
Shunt Current Measurements
Precision Filters
GENERAL DESCRIPTION

The OP07 has very low input offset voltage (75 µV max for
OP07E) that is obtained by trimming at the wafer stage. These
low offset voltages generally eliminate any need for external null-
ing. The OP07 also features low input bias current (±4 nA for the
OP07E) and high open-loop gain (200 V/mV for the OP07E).
The low offsets and high open-loop gain make the OP07 particu-
larly useful for high gain instrumentation applications.
The wide input voltage range of ±13 V minimum combined with a
high CMRR of 106 dB (OP07E) and high input impedance pro-
vide high accuracy in the noninverting circuit configuration.
Excellent linearity and gain accuracy can be maintained even at
high closed-loop gains. Stability of offsets and gain with time or
variations in temperature is excellent. The accuracy and stability
of the OP07, even at high gain, combined with the freedom
from external nulling have made the OP07 an industry standard
for instrumentation applications.
The OP07 is available in two standard performance grades. The
OP07E is specified for operation over the 0°C to 70°C range, and
the OP07C is specified over the –40°C to +85°C temperature range.
The OP07 is available in epoxy 8-lead PDIP and 8-lead SOIC. It
is a direct replacement for 725, 108A, and OP05 amplifiers;
741 types may be directly replaced by removing the 741’s nulling
potentiometer. For improved specifications, see the OP177 or
OP1177. For ceramic DIP and TO-99 packages and standard
micro circuit (SMD) versions, see the OP77.
Figure 1. Simplified Schematic
PIN CONNECTIONS
8-Lead PDIP (P-Suffix)
8-Lead SOIC (S-Suffix)
OP07–SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS

NOTES
1Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2Long-term input offset voltage stability refers to the averaged trend time of VOS vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 µV, refer to the typical performance characteristics. Parameter is sample tested.
3Sample tested.
4Guaranteed by design.
5Guaranteed but not tested.
Specifications subject to change without notice.
(VS = �15 V, TA = 25�C, unless otherwise noted.)
OP07
OP07C ELECTRICAL CHARACTERISTICS

NOTES
1Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2Long-term input offset voltage stability refers to the averaged trend time of VOS vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 µV, refer to the typical performance characteristics. Parameter is sample tested.
3Sample tested.
4Guaranteed by design.
5Guaranteed but not tested.
Specifications subject to change without notice.
(VS = �15 V, TA = 25�C, unless otherwise noted.)
OP07–SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS

NOTESInput offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.Guaranteed by design.Sample tested.
Specifications subject to change without notice.
(VS = �15 V, 0�C � TA � 70�C, unless otherwise noted.)
OP07C ELECTRICAL CHARACTERISTICS

NOTESInput offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.Guaranteed by design.Sample tested.
Specifications subject to change without notice.
(VS = �15 V, �40�C � TA � �85�C, unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . .±22 V
Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±22 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .±30 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . .Indefinite
Storage Temperature Range
S, P Packages . . . . . . . . . . . . . . . . . . . . . .–65°C to +125°C
Operating Temperature Range
OP07E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0°C to 70°C
OP07C . . . . . . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . .150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . .300°C
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.For supply voltages less than ±22 V, the absolute maximum input voltage is equal
to the supply voltage.
*�JA is specified for worst-case conditions, i.e., �JA is specified for device in socket
for PDIP package, and �JA is specified for device soldered to printed circuit board
for SOIC package.
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
OP07 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
ORDERING GUIDE
OP07
– Typical Performance Characteristics

TPC 1. Open-Loop Gain vs.
Temperature
MATCHED OR UNMATCHED SOURCE RESISTANCE (�)
100100k1k
MAXIMUM ERR
OR REFERRED
INPUT (mV)
10k
0.2

TPC 4. Maximum Error vs.
Source Resistance
TPC 7. Input Bias Current vs.
Temperature
TPC 2. Offset Voltage Change
due to Thermal Shock
MATCHED OR UNMATCHED SOURCE RESISTANCE (�)
100100k1k
MAXIMUM ERR
OR REFERRED
INPUT (mV)
10k
1.0

TPC 5. Maximum Error vs.
Source Resistance
TPC 8. Input Offset Current
vs. Temperature
TPC 3. Warm-Up Drift
TPC 6. Input Bias Current vs.
Differential Input Voltage
TPC 9. Low Frequency Noise
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