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NMC27C010Q20NSCN/a43avai200 ns, Vcc=5V+/-5%, 1,048,576-bit (128k x 8) UV erasable CMOS PROM
NMC27C010Q-20 |NMC27C010Q20NSN/a5960avai200 ns, Vcc=5V+/-5%, 1,048,576-bit (128k x 8) UV erasable CMOS PROM
NMC27C010Q-25 |NMC27C010Q25NSCN/a3avai250 ns, Vcc=5V+/-5%, 1,048,576-bit (128k x 8) UV erasable CMOS PROM
NMC27C010QE-200 |NMC27C010QE200NSN/a5530avai200 ns, Vcc=5V+/-10%, 1,048,576-bit (128k x 8) UV erasable CMOS PROM
NMC27C010QE-250 |NMC27C010QE250NSN/a5530avai250 ns, Vcc=5V+/-10%, 1,048,576-bit (128k x 8) UV erasable CMOS PROM


NMC27C010Q-20 ,200 ns, Vcc=5V+/-5%, 1,048,576-bit (128k x 8) UV erasable CMOS PROMapplications where fast turnaround, pattern experiments tion and low power consumption are importa ..
NMC27C010Q-25 ,250 ns, Vcc=5V+/-5%, 1,048,576-bit (128k x 8) UV erasable CMOS PROMapplications where fast turnaround, pattern experiments tion and low power consumption are importa ..
NMC27C010QE-200 ,200 ns, Vcc=5V+/-10%, 1,048,576-bit (128k x 8) UV erasable CMOS PROMNMCZ7CO1O National Semiconductor PRELIMINARY NMC27C010 (Former NMC27C1023)* 1,048,576-Bi ..
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NMC27C010Q20-NMC27C010Q-20-NMC27C010Q-25-NMC27C010QE-200-NMC27C010QE-250
150 ns, Vcc=5V+/-5%, 1,048,576-bit (128k x 8) UV erasable CMOS PROM
NMC27C010
National
Semiconductor
PRELIMINARY
NMC27C010 (Former NM027C1023)*
1,048,576-Bit (128k It 8) UV Erasable CMOS PROM
General Description
The NMC27CO10 is a high-tToad 1024K UV erasable and
electrically reprogrammabie CMOS EPROM, ideally suited
for applications where fast turnaround, pattern experiments
tion and low power consumption are important require-
ments.
The NMC27C010 is designed to operate with a single + 5V
power supply with 25% or t10% toierance. The CMOS
design allows the part to operate over extended and military
temperature ranges.
The NMC27C010 is packaged in a 32-pin dual-in-line pack-
age with transparent lid. The transparent lid allows the user
to expose the chip to ultraviolet light to erase the bit pattern.
A new pattern can then be written electrically into the device
by following the programming procedure.
This EPROM is tabricated with National's proprietary, time
proven CMOS double-poly silicon gate technology which
combines high performance and high density with low pow-
er consumption and excellent reliability.
Features
II Clocked sense amps for fast access time down to
150 ns
u Low CMOS power consumption
- Active power: 110 mW max
- Standby power: 0.55 mW max
I! Extended temperature range (NMC27G010OE), -40''C
to +85°C and military temperature range
(NMC27C010QM), -55''C to +125°C, available
Pin compatible with NMOS bytewide 1024K EPROMs
Fast and reliable programming-loo us typical/byte
Static operation-no clocks required
TTL, CMOS compatible inputs/outputs
TRI-STATE® output
Optimum EPROM for total CMOS systems
Manufacturer's identification code for automatic pro-
gramming control
High current CMOS level output drivers
Block Diagram
DATA OUTPUTS tk-th
1ltt _ w-----------,
0ND o---
W_. iiiiim
IV - numi sum, '
m - cmnmtuun _ OUTPUT Pln Names
et - macaw Lacic * IUFFERS
f AO-Alt, Addresses
- CE Chip Enable
rt ntcgnm . - , smut: at- Output Enable
- ' Oo-Or Outputs
A0 m -2 PGM Program
ADDRESS , - = NC No Connect
INPUTS - . mums"
- X . cm umux
- DECODER '.
'Some programmer manufacturers will call this device NMC27C1023.
TL/D/9182-1
Connection Diagram
NMC27CO1OQ
Dual-In-Llne Package
4 Mbit 2 Mbit
Vpp Vpp Yrre-" 1 32 ~VOC
A16 A16 A16- 2 31-13?»
A15 A15 A15- 3 30 -NC
A12 A12 A12- 4 29 -A14
A7 A7 A7- 5 28 -A13
A6 A6 M-- 6 27 -A8
A5 A5 Ali' 7 26 -A9
A4 A4 A4- 8 25 -A11
A3 A3 A3- 9 24 .-irE
A2 A2 A2- 10 23 -hto
A1 A1 A1411 22 "-tTE"
A0 A0 A0- 12 21 -o,
oo th 00-13 20 -q,
th 01 th- " 19 I-os
02 % ozd 15 18 L04
GND GND tmo-- 16 17 u-os
TL/D/91B2-2
2 Mbit 4 Mbit
V00 V00
PGM A18
A17 A17
A14 A14
A13 A13
A1 1 A1 1
A10 A10
ths Os
Not... Socket compatible EPROM pin ctmfigurations are shown in the blocks adjacent to the NM027C010 pins.
Order Number NMCZ7C0100
See NS Package Number J32AG
Commercial Temperature Range (0°C to + 70'C)
Commercial Temperature Range (0'C to + 70'C)
Vcc = 5V i5% Vcc = 5V $1096
Parameter/Order Number Access TIme (ns) Parameter/Order Number Access Time (ns)
NMC27C010015 150 NMC27C010t2150 150
NMC27C010Q17 170 NMC27C0100170 170
NMC27C010020 200 NMC27C010Q200 200
NMC27C010t225 250 NMC27C010Q250 250
Extended Temperature Range (-4WC to + 85°C)
vcc "Kat 5v 110%
Mllltary Temperature Range c- 55''C to + 125°C)
Vcc = tiV 110%
OlOOLZOWN
Parameter/Order Number Access Time (ns) Parameter/Order Number Access Time (ns)
NMC27C010OE170 170 NMC27C010OM170 170
NMCZ7CO1OQE200 200 NMC27CO1OQM200 200
NMC27C01OQE250 250 NMC27C010t2M250 250
NOTE: Surface mount PLCC package available for ttttttttttttregal and extended temperature ranges only.
NMCZ7CO1O
COMMERCIAL TEMPERATURE RANGE
Absolute Maximum Ratings (Note1)
Temperature Under Bias - 10°C to + 80''C
Storage Temperature -65''C to + 150°C
All Input Voltages except A9 with
Respect to Ground (Note 10)
All Output Voltages with
Respect to Ground (Note 10)
Vpp Supply Voltage and A9
with Respect to Ground
+ 6.5V to -0.6V
Vcc+1.0Vto GND-thm/
Power Dissipation 1.0W
Lead Temperature (Soldering, 10 sec.) 300''C
ESD Rating
(Mil Spec 883C, Method 3015.2) 2000V
Operating Conditions (Note7)
Temperature Range
Vcc Power Supply
UC to + 70"C
During Programming + 14.0V to -0.6V NMC27C010t215, 17,20,25 + 5V :5%
vcc Supply Voltage with NMC27C010Q150, 170,200, 250 + 5V i10°/o
Respect to Ground + 7.0V to -0.6V
READ OPERATION
DC Electrical Characteristics
Symbol Parameter Conditions Mln Typ Max Units
IL. Input Load Current Ve: = Vcc or GND 1 WA
ILO Output Leakage Current VouT = Vcc or GND, CE = VIH 1 pA
Icc1 Vcc Current (Active) 3 = I/tut = 5 MHz 15 30 m A
(Note 9) TTL Inputs Inputs = VIH or VI., l/O = 0 mA
[cog Vcc Current (Active) E = GND,f = 5 MHz 10 20 m A
(Note 9) CMOS Inputs Inputs = Voc orGND, l/O = 0 mA
Iccsm Vcc Current (Standby) E = l/w, 0.1 1 m A
TTL Inputs
lccsaz "tiifi1'gltrndby) E V00 0.5 100 “A
Ipp Vpp Load Current Vpp = VCC 10 “A
" Input Low Voltage -0.2 0.8 V
Vm Input High Voltage 2.0 Vcc + 1 V
VOL1 Output Low Voltage IOL = 2.1 mA 0.40 V
VOH1 Output High Voltage loH = -2.5 mA 3.5 V
VOL2 Output Low Voltage IOL = 10 “A 0.1 V
VOH2 Output High Voltage lor, = --10 p.A Vcc - 0.1 V
AC Electrical Characteristics
NM027CO10
Symbol Parameter Condltlons 015, 0150 IMP, 0170 Q20, 0200 025, 0250 Units
Mln Max Mln Max Min Max Mln Max
tacc Address to Output Delay tTA--, E == VI. 150 170 200 250 ns
PG = VIH
tCE Etc Output Delay tTE = vlL, P-GM = v H 150 170 200 250 ns
to]; E to Output Delay E = Vic, Ptih/' = VIH 60 75 75 100 ns
tDF UE High to Output Float E = vo m = VIH o 50 o 55 55 60 ns
top tTE High to Output Float irE = v.L, PtTM = " o 50 o 55 55 o 60 ns
tOH 1utptltPld from Addresses, 1: w = "
CE or OE, Whichever P M = Ihr, 0 0 0 0 ns
Occurred First
Temperature Under Bias
MILITARY AND EXTENDED TEMPERATURE RANGE
Absolute Maximum Ratings (Note1)
If Mllltary/Aerospace speeltled devlces are required,
please contact the Natlonal Semiconductor Sales
OmttefDiatrlbutttrtt for availability and specifications.
Storage Temperature
All Input Voltages except A9 with
Respect to Ground (Note 10)
All Output Voltages with
Respect to Ground (Note 10)
Vpp Supply Voltage and A9
with Respect to Ground
During Programming
Operating Temp. Range
-65'C to + 150°C
+ 6.5V to -0.6V
vcc+ 1.0V to GND-0.6V
+ 14.0V to -0.6V
Vcc Supply Voltage with
Respect to Ground
Power Dissipation
Lead Temperature (Soldering, 10 sec.)
ESD Rating
(Mil Spec 8836, Method 3015.2)
+ 7.0V to -0.6V
Operating Conditions (Note7)
Temperature Range
NMC27C010QE150, 170, 200, 250
NMC27C01OQM170, 200, 250
-40''C to + 85''C
- 55°C to + 125°C
VCC Power Supply + 5V i 10%
READ OPERATION
DC Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Units
IL, Input Load Current VIN = Vcc or GND 10 FA
lLo Output Leakage Current VOUT = VCC or GND, O_E = Vm IO HA
ICC, VCC Current (Active) CE = V"_,f = 5 MHz 15 30 m A
(Note 9) TTL Inputs Inputs = VIH or VlL, I/O = 0 mA
lccz Vcc Current(Active) CE = GND,f = 5 MHz 10 20 m A
(Note 9) CMOS Inputs Inputs = Vcc or GND, l/O = 0 mA
|CCSB1 Vcc Current (Standby) CE = " o. 1 1 f 'm A
TTL Inputs
100332 "ticgiuc,rfts(Standby) CE Vcc 0.5 1 00 M A
lpp Vpp Load Current Vpp = Vcc 10 p.A
" Input Low Voltage -0.2 0.8 V
" Input High Voltage 2.0 Vcc + 1 v
VOL1 Output Low Voltage IOL = 2.1 mA 0.40 V
V0H1 Output High Voltage loH = -1.6 mA 3.5 V
Vout Output Low Voltage IOL = 10 “A 0.1 V
Vore Output High Voltage IOH = - 10 “A Vcc - 0.1 V
AC Electrical Characteristics
NMC27CO100
Symbol Parameter Conditions E150 E170, M170 E200, M200 E250, M250 Unlts
Min Max Min Max Min Max Min Max
tACC Address to Output Delay tEC.--, :TE = " 150 170 200 250 ns
PGM - "
tCE tTEto Output Delay trE = v.L, p-trig- = VIH 150 170 200 250 ns
tog E to Output Delay UE = Vic, pt-SM- Tar. V.” 60 75 75 100 ns
top CE High to Output Float CE = VIL, 5cm = VIH 0 50 55 55 0 60 ns
top O_E High to Output Float GE = vo PETE = " 50 55 55 60 ns
tOH 1oytplt...rfold from Addresses, Trc-- T = "
CE or OE, Whichever PGM = VIH O 0 0 0 ns
Occurred First
Ol-OOLZOWN
NM027C010
Capacitance TA = +25°C,f --= 1 MHz (Note 2)
Symbol Parameter Condltlons Typ Max Units
Cm InputCapacitance Vm = 0V 9 15 pF
Cour Output Capacitance VOUT = ov 12 15 pF
AC Test Conditions
Output Load 1 TTL Gate and Timing Measurement Reference Level
CL = 100 pF (Note 8) Inputs 0.8V and 2V
Input Rise and Fall Times 3 5 ns Outputs 0.8V and 2V
Input Pulse Levels 0.45V to 2.4V
AC Waveforms (Notes 6, 7, a 9)
ADDRESSES 2.tN JI ADDRESSES VALID JI y
0.8V r r
- 2.0V ' " .
CE MN 5 r r /
tcs - hr -
(NOTES 4, 5)
- 2.0V
OE 0.88 rr /
tos JJ - tor -
(NOTE 3) r r (NOTES 4, 5)
2.0V Hf-2 I , “Fl
OUTPUT o.av VALID OUTPUT r r ())))t'?
J I r "
- to” am
(NOTE 3)
TL/D/9182-3
Note 1: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note 2.. This parameter is only sampled and is not 100% tested.
Note a: UE may be delayed up to tatx; - toe after the falling edge of CE without impacting tACC.
Not. 4: The top and tap compare level is determined as follows:
High to TRI-STATE. the measured Vom (DC) - 0.1OV;
Low to TTTI-STATE, the measured V0L1 (DC) + 0.10V.
Note S: TRI-STATE may be attained using IX or CE.
Note tk The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.1 " ceramic capacitor be used on
every device between Voc and GND,
Note r.. The outputs must be restricted to Vcc + 1.0V to avoid Iatch-up and device damage.
Note tk 1 TTL Gate: '01. = 1.6 m. km = -400 "
CL: 100 pF includes fotture capacitance.
Note it.. Vpp may be connected to Voc except during programming.
Nola " Inputs and outputs can undershoot to -2.OY for 20 ns Max.
Programming Characteristics (Notes 1, 2, 3 a 4)
Symbol Parameter Condltlons Min Typ Max Unlts
Us Address Setup Time 1 p.s
tOES TE Setup Time 1 ps
toes E Setup Time a = VIH 1 us
tDS Data Setup Time 1 p.s
typs Vpp Setup Time 1 p.s
tvcs Vcc Setup Time 1 ps
tAH Address Hold Time o ps
10H Data Hold Time 1 )5
top Output Enable to Output Float Delay tX --... " 0 60 ns
tpw Program Pulse Width 95 100 105 p5
toE Data Valid from UE CE = " 100 ns
Ipp Vpp Supply Current During E = " 30 m A
Programming Pulse PGM = "
lcc Vcc Supply Current 10 mA
TA Temperature Ambient 2O 25 30 "C
Vcc Power Supply Voltage 6.0 6.25 6.5 V
Vpp Programming Supply Voltage 12.5 12.75 13.0 V
tpn Input Rise, Fall Time 5 ns
l/tc Input Low Voltage 0.0 0.45 V
VIH Input High Voltage 2.4 4.0 ' V
tm Input Timing Reference Voltage 0.8 1.5 2.0 V
tour Output Timing Reterence Voltage 0.8 1.5 2.0 V
OLOOLZOWN
NMC27C010
Programming Waveforms (Notea)
PROGRAM
VERIFY
,__’Lt‘l
DATAOUTVAUD
PROGRAM
ADDRESSES ADDRESS N
DATA IN STABLE
DATA N
tbs to" tor
- 2Y f
Note 1: National's standard product warranty applies only to devices programmed to specifications described herein. , '
Note 2: VCC must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. The EPROM must not be inserted into or removed from a
board with voltage applied to Vpp or Vcc.
Note & The maximum absolute allowable voltage which may be applied to the Vpp pin during programming is 14V. Care must be taken when switching the Vpp
supply to prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1 “F capacitor is required across Vpp, Vcc to GND to suppress
spurious voltage transients which may damage the device.
Note 4: Programming and program verify are tested with the fast Program Algorithm, at typical power supply voltages and timings.
TL/D/9182-5
Fast Programming Algorithm Flow Chart
ADDR = FIRST LOCATION
v06: ti.25Y
v”: 12.75Y
( It = 0 )
-H PROGRAM ONE 100Hs PULSE )
INCREMENT X
DEVICE
FAILED
INCREMENT ADDR
ta''':,','::',',':',':':',':],,),',:":,',,',,',,':,,:,,:),
Vcc"--. 1/prra 5 av 35%
DEVICE
FAILED
iEWE PASSED
TL/D/9182--6
FIGURE 1
OI-OOLZOWN
NMC27CD10
Functional Description
DEVICE OPERATION
The six modes of operation of the NMC27C010 are listed in
Table I. It should be noted that all inputs for the six modes
are at TTL levels. The power supplies required are Vcc and
Vpp. The Vpp power supply must be at 12.75V during the
three programming modes, and must be at 5V in the other
three modes. The Vcc power supply must be at 6.25V dur-
ing the three programming modes, and at 5V in the other
three modes.
Read Mode
The NMC27CO10 has two control functions, both of which
must be logically active in order to obtain data at the out-
puts. Chip Enable (CE) is the power control and should be
used for device selection. Output Enable (UI?) is the output
control and should be used to gate data to the output pins,
independent of device selection. Assuming that addresses
are stable, address access time (M00) is equal to the delay
from C? to output (tCE). Data is available at the outputs tog
after the falling edge of tre, assuming that CE has been low
and addresses have been stable for at least tAcc-ttyr
The sense amps are clocked for fast access time. Vcc
should therefore be maintained at operating voltage during
read and verify. If Vcc temporarily drops below the specified
voltage (but not to ground) an address transition must be
pertormed after the drop to insure proper output data.
Standby Mode
The NMC27C010 has a standby mode which reduces the
active power dissipation by over 99%, from 110 mW to
0.55 mW, The NMC27C010 is placed in the standby mode
by applying a CMOS high signal to the E input. When in
standby mode, the outputs are in a high impedance state,
independent of the tre input.
Output OR-Tylng
Because the NMC27CO10 is usually used in larger memory
arrays, National has provided a 2-line control function that
accommodates this use of multiple memory connections.
The 2-line control function allows for:
a) the lowest possible memory power dissipation, and
b) complete assurance that output bus contention will not
occur.
To most efficiently use these two control lines, it is recom-
mended that O_E be decoded and used as the primary de-
vice selecting function, while UE be made a common con-
nection to all devices in the array and connected to the
READ line from the system control bus. This assures that all
deselected memory devices are in their low power standby
modes and that the output pins are active only when data is
desired from a particular memory device.
Programming
CAUTION: Exceeding 14V on the Vpp or A9 pin will damage
the NMC27C010.
Initially, and after each erasure. all bits of the NMC27C010
are in the "1" state. Data is introduced by selectively pro-
gramming ''0's" into the desired bit locations. Although only
''0's" will be programmed, both "rs" and ''0's'' can be pre-
sented in the data word. The only way to change a "o" to a
"1" is by ultraviolet light erasure.
The NMC27C010 is in the programming mode when the Vpp
power supply is at 12.75V and UE is at VlH- It is required
that at least a 0.1 pF capacitor be placed across Vpp, Vcc
to ground to suppress spurious voltage transients which
may damage the device. The data to be programmed is
applied 8 bits in parallel to the data output pins. The levels
required for the address and data inputs are TTL.
When the address and data are stable, an active low, TTL
program pulse is applied to the plm input. A program pulse
must be applied at each address location to be pro-
grammed. The NM027C010 is programmed with the Fast
Programming Algorithm shown in Figure f. Each Address is
programmed with a series of 100 FS pulses until it verifies
good, up to a maximum of 25 pulses. Most memory cells will
program with a single 100 its pulse. The NMC27C010 must
not be programmed with a DC signal applied to the FEM
input.
Programming multiple NMC27C010 in parallel with the same
data can be easily accomplished due to the simplicity of the
programming requirements. Like inputs of the parallel
NMC27C010 may be connected together when they are
programmed with the same data. A low level TTL pulse ap-
plied to the PGM input programs the paralleled
NMC27C010,
Program Inhlblt
Programming multiple NMC27C010's in parallel with differ-
ent data is also easily accomplished. Except for CE all like
inputs (including E and W) of the parallel NMC27C010
may be common. A TTL low level program pulse applied to
an NMC27C010's 755M input with CE at " and Vpp at
12.75V will program that NMC27C010, A TTL high level tTE
input inhibits the other NMC27C010's from being pro-
grammed.
Program Verify
A verify should be performed on the programmed bits to
determine whether they were correctly programmed. The
verify may be performed with Vpp at 12.75V. Vpp must be at
Vcc, except during programming and program verify.
Manufaeturer's ldentlflcation Code
The NMC27C010 has a manufacturer's identification code
to aid in programming. When the device is inserted in an
EPROM programmer socket, the programmer reads the
code and then automatically calls up the specific program-
ming algorithm for the part. This automatic programming
control is only possible with programmers which have the
capability of reading the code.
The Manufacturer's Identification code, shown in Table ll,
specifically identifies the manufacturer and the device type.
The code for the NMC27C010 is "8F86", where "8F" desig-
nates that it is made by National Semiconductor, and "86"
designates a 1Megabit byte-wide part.
Functional Description (Continued)
TABLE I. Mode Selection
Pins E tre pTita Vpp Vcc Outputs
Mode (22) (24) (31) (1) (32) (13-15,t7-2t)
Read " " VIH Vcc 5V DOUT
Standby VIH Don't Care Don't Care Vcc 5V Hi-Z
Output Disable Don't Care Ihr, V.H Vcc 5V Hi-Z
Program Ihr. " Vit. 12.75V 6.25V Dm
Program Verify " " VIH 12.75V 6.25V DOUT
Program Inhibit l/m Don't Care Don't Care 12.75V 6.25V Hi-Z
TABLE II. Manufacturer’s ldentlficatlion Code
Pins A0 Or Os Os O4 Os 02 l 00 Hex
(12) (21) (20) (19) (18) (17) (15) (14) (13) Data
Manufacturer Code Ihr. 1 0 0 0 1 1 1 1 BF
Device Code v.H 1 o o o o 1 1 o 86
The code is accessed by applying 12V $0.5V to address
pin A9. Addresses AI-M, A10-A16, and all control pins
are held at VIL. Address pin A0 is held at VI. for the manu-
facturer’s code, and held at VIH for the device code. The
code is read on the eight data pins, Oo-or. Proper code
access is only guaranteed at 25''C 1-5’C.
ERASURE CHARACTERISTICS
The erasure characteristics of the NMC27C010 are such
that erasure begins to occur when exposed to light with
wavelengths shorter than approximately 4000 Angstroms
(A). It should be noted that sunlight and certain types of
fluorescent lamps have wavelengths in the 3000A-4000A
range.
AFTER PROGRAMMING
Opaque labels should be placed over the NMC27C010 win-
dow to prevent unintentional erasure. Covering the window
will also prevent temporary functional failure due to the gen-
eration of photo currents.
The recommended erasure procedure for the NMC27C010
is exposure to short wave ultraviolet light which has a wave-
length of 2537 Angstroms A. The integrated dose (i.e., UV
intensity X exposure time) for erasure should be a minimum
of 15 W-sec/cm2.
The NMC27C010 should be placed within 1 inch of the lamp
tubes during erasure. Some lamps have a filter on their
tubes which should be removed before erasure. Table III
shows the minimum NMC27C010 erasure time for various
light intensities.
An erasure system should be calibrated periodically. The
distance from lamp to unit should be maintained at one inch.
The erasure time increases as the square of the distance. (ll
distance is doubled the erasure time increases by a factor of
4.) Lamps lose intensity as they age. When a lamp is
changed, the distance has changed, or the lamp has aged,
the system should be checked to make certain full erasure
is occurring. Incomplete erasure will cause symptoms that
can be misleading. Programmers, components, and even
system designs have been erroneously suspected when in-
complete erasure was the problem.
SYSTEM CONSIDERATION
The power switching characteristics of EPROMs require
careful decoupling of the devices. The supply current, lcc,
has three segments that are of interest to the system de-
sign)-tho standby current level, the active current level,
and the transient current peaks that are produced by volt-
age transitions on input pins. The magnitude of these tran-
sient current peaks is dependent on the output capacitance
loading the device. The associated VCC transient voltage
peaks can be suppressed by properly selected decoupling
capacitors. It is recommended that at least a 0.1 " ceramic
capacitor be used on every device between Vcc and GND.
This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7 pF bulk electrolytic
capacitor should be used between Vcc and GND for each
eight devices. The bulk capacitor should be located near
where the power supply is connected to the array. The pur-
pose of the bulk capacitor is to overcome the voltage drop
caused by the inductive effects of the PC board traces.
TABLE III. NMC27C010
Minimum Erasure Time
Light Intensity Erasure Time
(pWatts/cmz) (Minutes)
15,000 20
10,000 25
5,000 50
OLOOLZOWN
NMC27C010
Package Informati
0 SPACES AT
(1.210)
0. th_01li,
tth-ani 381
th -t.!i-te0 0. MO
(0. "iT"'7"C'i'',
-)t-rj-er,
10.1t7-th381l
6 SPACES AT
(1.210)
0.551 10.002
(14.00 $0.051)
25 0490-0530 059010.005
(12A5-13A6) (14.99i0.127)
(CONTACT DIMENSION)
VIEW A-A
C", 2 1 32 Mi
(1.14:)
D___390- 0.430
r.e-riiiriii 10.)92
0100 0140
(2540 3555)
(CONTACT DIMENSION)
6.M3-th021
, . sr7s'1-,-jtti') . - .
m . - .
l th026-0.03?
P0111013)
105m _ (th660-0.813)
(11.43)
T 0.060 -0.095
(1diN-2.413l
0.405 -0.495
(12.32 - 12.57)
TL/D/9182-10
32-Lead PLCC Package
Order Number NM027C010V
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
NMC27C010Q25 - product/nch7cO10q25?HQS=T|-null-null-dscatalog-df-pf—nuII-wwe
NMC27C010QE200 - product/nch7cO10qe200?HQS=TI-nuIl-nu|I-dscatalog-df-pf-nulI-wwe
NMC27C01OQE170 - product/nm027c010qe170?HQS=TI—nu|I—nu|I-dscatalog-df-pf-nulI-wwe
NMC27C010Q250 - product/nmc27c010q250?HQS=TI-nuIl-nu|I-dscataIog-df—pf-null-wwe
NMC27C010QE250 - product/nm027c010qe250?HQS=T|-nu|I-nu|I-dscatalog-df-pf-nulI-wwe
NMC27CO1OQ200 - product/nmc27cO10q200?HQS=T|-nu|I-nu|I-dscatalog-df-pf-nuII-wwe
NMC27C010Q20 - productlnch7cO10q20?HQS=T|-null-null-dscatalog—df—pf—nuII-wwe
NMC27C010Q170 - product/nmc27c010q170?HQS=TI-nuIl-nu|I-dscataIog-df—pf-null-wwe
NMC27C010Q17 - product/nmc27cO10q17?HQS=T|-null-null-dscatalog-df-pf—nuII-wwe
NMC27C010Q150 - product/nm027c010q150?HQS=TI-nu||-nu|I-dscataIog-df-pf-null-wwe
NMC27C01OQ15 - product/nmc27co10q15?HQS=T|-null-null-dscatalog-df—pf—nuII-wwe
NMC27C010QM250 - product/nm027c010qm250?HQS=TI-nu|I-nulI-dscatalog-df-pf-nulI-wwe
NMC27C010QM170 - product/nmc27co10qm170?HQS=Tl-nu|I-nu|I-dscataIog-df-pf-null-wwe
NMC27C010QM200 - product/nmc27cO10qm200?HQS=T|—nu|I-null-dscatalog-df-pf—nulI-wwe
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