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NDS8926
Dual N-Channel Enhancement Mode Field Effect Transistor
July 1996
NDS8 926
Dual N-Channel Enhancement M ode Field Effect Transistor
General Description Features________________________________________________________________________________________________
Absolute M aximum Ratings TA = 25°C unless otherwise note
Symbol Parameter NDS8926 UnitsVDSS Drain-Source Voltage 20 VGSS Gate-Source Voltage 8 VD Drain Current - Continuous (Note 1a) 5.5 A
- Pulsed 20D Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note1b) 1
(Note1c) 0.9
TJ,TSTG Operating and Storage Temperature R ange -55 to 150 °C
THERMAL CHARACTERISTICSθJA Thermal Resistance, Junction-to-Ambient (Note 1a) °C/WθJC Thermal Resistance, Junction-to-Case (Note 1) °C/W
These N-Channel enhancement mode power field
effect transistors are produced using National's
proprietary, high cell density, DMOS technology.
This very high density process is especially tailored
to minimize on-state resistance and provide
superior switching performance. These devices are
particularly suited for low voltage applications such
as DC motor control and DC/DC conversion where
fast switching, low in-line power loss, and resistance
to transients are needed.
5.5 A, 20 V. R DS(ON) = 0.035 Ω @ VGS = 4.5 V
RDS(ON) = 0.045 Ω @ VGS = 2.7 V.
High density cell design for extremely low R DS(ON).
High power and current handling capability in a
widely used surface mount package.
Dual MOSFET in surface mount package.
