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NC7NZ14K8XFSCN/a2332avaiTinyLogic UHS Inverter with Schmitt Trigger Input
NC7NZ14K8XFAIRCHILD ?N/a2107avaiTinyLogic UHS Inverter with Schmitt Trigger Input
NC7NZ14K8XFAIRCHILDN/a2130avaiTinyLogic UHS Inverter with Schmitt Trigger Input
NC7NZ14K8XFAIN/a333avaiTinyLogic UHS Inverter with Schmitt Trigger Input
NC7NZ14K8X_NLFSCN/a6000avaiTinyLogic UHS Inverter with Schmitt Trigger Input


NC7NZ14K8X_NL ,TinyLogic UHS Inverter with Schmitt Trigger InputElectrical Characteristics (Continued)V T = +25°CT = −40°C to +85°CCC A ASymbol Parameter Unit Con ..
NC7NZ17K8X ,TinyLogic UHS Triple Buffer with Schmitt Trigger InputsFeaturesThe NC7NZ17 is a triple buffer with Schmitt trigger inputs

NC7NZ14K8X-NC7NZ14K8X_NL
TinyLogic UHS Inverter with Schmitt Trigger Input
NC7NZ14 TinyLogic UHS Inverter with Schmitt Trigger Input May 2001 Revised January 2005 NC7NZ14 TinyLogic UHS Inverter with Schmitt Trigger Input General Description Features The NC7NZ14 is a triple Inverter with Schmitt Trigger inputSpace saving US8 surface mount package from Fairchild’s Ultra High Speed Series of TinyLogic.MicroPak Pb-Free leadless package The device is fabricated with advanced CMOS technology Ultra High Speed; t 3.7 ns Typ into 50 pF at 5V V PD CC to achieve ultra high speed with high output drive while High Output Drive; ±24 mA at 3V V maintaining low static power dissipation over a very broad CC V operating range. The device is specified to operate CCBroad V Operating Range; 1.65V to 5.5V CC over the 1.65V to 5.5V V range. The input and output are CC Power down high impedance inputs/output high impedance when V is 0V. Inputs tolerate voltages CC Overvoltage Tolerant inputs facilitate 5V to 3V up to 7V independent of V operating voltage. CC translation Patented noise/EMI reduction circuitry implemented Ordering Code: Product Order Package Code Package Description Supplied As Number Number Top Mark NC7NZ14K8X MAB08A 7NZ14 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel NC7NZ14L8X MAC08A P6 Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel Pb-Free package per JEDEC J-STD-020B. Logic Symbol Connection Diagrams IEEE/IEC (Top View) Pin Descriptions Pin Names Description A Input Y Output AAA represents Product Code Top Mark - see ordering code. Note: Orientation of Top Mark determines Pin One location. Read the Top Function Table Product Code Mark left to right, Pin One is the lower left pin (see diagram). Y = A Pad Assignment for MicroPak Input Output AY LH HL H = HIGH Logic Level L = LOW Logic Level (Top Thru View) TinyLogic is a registered trademark of . MicroPak is a trademark of . © 2005 DS500492
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