IC Phoenix
 
Home ›  NN2 > NB7V586M,1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer /Translator
NB7V586M Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
NB7V586MONN/a119avai1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer /Translator


NB7V586M ,1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer /TranslatorFeatures VREFAC0IN0• Maximum Input Data Rate > 10 Gb/s TypicalQ2VT00Q2IN0• Data Dependent Jitter < ..
NB7VQ1006MMNG , 1.8V / 2.5V 10Gbps Equalizer Receiver with 1:6 Differential CML Outputs
NB7VQ1006MMNTXG , 1.8V / 2.5V 10Gbps Equalizer Receiver with 1:6 Differential CML Outputs
NBB-402-T1 , CASCADABLE BROADBAND GaAs MMIC AMPLIFIER DC TO 8GHz
NBB-502-T1 , CASCADABLE BROADBAND GaAs MMIC AMPLIFIER DC TO 4GHz
NBC12429 ,3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)Prepared by: Terry McHenry, FAEJoseph HughesAPPLICATION NOTEIC Design EngineerON SemiconductorINTRO ..
NJM2102 , SYSTEM RESET IC
NJM2102 , SYSTEM RESET IC
NJM2102L , SYSTEM RESET IC
NJM2103L , SYSTEM RESET IC
NJM2106M , ACTIVE BASS EXPANDER
NJM2107 , SINGLE OPERATIONAL AMPLIFIER


NB7V586M
1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer /Translator
NB7V586M
1.8V Differential 2:1 Mux
Input to 1.2V/1.8V 1:6 CML
Clock/Data Fanout Buffer /
Translator
Multi−Level Inputs w/ Internal Termination
Description

The NB7V586M is a differential 1−to−6 CML Clock/Data
Distribution chip featuring a 2:1 Clock/Data input multiplexer with an
input select pin. The INx/INx inputs incorporate internal 50 �
termination resistors and will accept differential LVPECL, CML, or
LVDS logic levels (see Figure 12). The INx/INx inputs and core logic
are powered with a 1.8 V supply. The NB7V586M produces six
identical differential CML output copies of Clock or Data. The outputs
are configured as three banks of two differential pair. Each bank (or all
three banks) have the flexibility of being powered by any combinationof either a 1.8 V or 1.2 V supply.
The 16 mA differential CML output structure provides matching
internal 50 � source terminations and 400 mV output swings when
externally terminated with a 50 � resistor to VCCOx (see Figure 11).
The 1:6 fanout design was optimized for low output skew and
minimal jitter and is ideal for SONET, GigE, Fiber Channel,Backplane and other Clock/Data distribution applications operating
up to 6 GHz or 10 Gb/s typical. The VREFAC reference outputs can be
used to rebias capacitor−coupled differential or single−ended input
signals.
The NB7V586M is offered in a low profile 5x5 mm 32−pin Pb−Free
QFN package. Application notes, models, and support documentation
are available at www..
The NB7V586M is a member of the GigaComm™ family of high
performance clock products.
Features
Maximum Input Data Rate > 10 Gb/s Typical Data Dependent Jitter < 10 ps Maximum Input Clock Frequency > 6 GHz Typical Random Clock Jitter < 0.8 ps RMS, Max Low Skew 1:6 CML Outputs, 20 ps Max 2:1 Multi−Level Mux Inputs 175 ps Typical Propagation Delay 50 ps Typical Rise and Fall Times Differential CML Outputs, 330 mV Peak−to−Peak, Typical Operating Range: VCC = 1.71 V to 1.89 V Operating Range: VCCOx = 1.14 V to 1.89 V Internal 50 � Input Termination Resistors VREFAC Reference Output QFN32 Package, 5 mm x 5 mm −40°C to +85°C Ambient Operating Temperature
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED