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MXD1210MAXN/a295avaiNonvolatile RAM Controller


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MXD1210
Nonvolatile RAM Controller
General Description
The MXD1210 nonvolatile RAM controller is a very low-
power CMOS circuit that converts standard (volatile)
CMOS RAM into nonvolatile memory. It also continually
monitors the power supply to provide RAM write protec-
tion when power to the RAM is in a marginal (out-of-tol-
erance) condition. When the power supply begins to
fail, the RAM is write-protected, and the device switch-
es to battery-backup mode.
Applications

Microprocessor Systems
Computers
Embedded Systems
Features
Battery BackupMemory Write Protection230µA Operating Mode Quiescent Current2nA Backup Mode Quiescent CurrentBattery Freshness SealOptional Redundant BatteryLow Forward-Voltage Drop on VCCSupply Switch5% or 10% Power-Fail Detection OptionsTests Battery Condition During Power-Up8-Pin SO Available
MXD1210
Nonvolatile RAM Controller
VCCI+5V1
VBATT2
GND
VCC
CMOS
RAM
MXD1210
FROM
DECODER
VBATT1
VCCO
PARTTEMP RANGEPIN-PACKAGE

MXD1210C/D0°C to +70°CDice*
MXD1210CPA0°C to +70°C8 PDIP
MXD1210CSA0°C to +70°C8 SO
MXD1210CWE0°C to +70°C16 Wide SO
MXD1210EPA-40°C to +85°C8 PDIP
MXD1210ESA-40°C to +85°C8 SO
MXD1210EWE-40°C to +85°C16 Wide SO
MXD1210MJA-55°C to +125°C8 CERDIP
Typical Operating Circuit
Ordering Information

CEOGND
VCCI
VBATT2VBATT1
TOL
VCCO
DIP/SO

TOP VIEW
MXD1210
N.C.N.C.
VCCI
N.C.
VBATT2
N.C.
CEO
N.C.
MXD1210
WIDE SO

VCCO
N.C.
TOL
VBATT1
N.C.
N.C.
GND
Pin Configurations

19-0154; Rev 2; 11/05
*Contact factory for dice specifications.
Devices in PDIP and SO packages are available in both lead-
ed and lead-free packaging. Specify lead free by adding the +
symbol at the end of the part number when ordering. Lead free
not available for CERDIP package.
MXD1210
Nonvolatile RAM Controller
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS

(TA= TMINto TMAX, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCIto GND..........................................................-0.3V to +7.0V
VBATT1 to GND.....................................................-0.3V to +7.0V
VBATT2 to GND.....................................................-0.3V to +7.0V
VCCOto GND................................................-0.3V to (VS+ 0.3V)
(VS= greater of VCCI, VBATT1, VBATT2)
Digital Input and Output
Voltages to GND.....................................-0.3V to (VCCI+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
8-Pin PDIP (derate 9.09mW/°C above +70°C)..............727mW
8-Pin SO (derate 5.88mW/°C above +70°C).................471mW
8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW
16-Pin Wide SO (derate 9.52mW/°C above +70°C).....762mW
Operating Temperature Range
C Suffix.................................................................0°C to +70°C
E Suffix..............................................................-40°C to +85°C
M Suffix...........................................................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

TOL = GND4.755.50Supply VoltageVCCITOL = VCCO4.505.50V
Input High VoltageVIH2.2V
Input Low VoltageVIL0.8V
Battery VoltageVBATT1
VBATT21 or 2 batteries (Note 1)2.04.0V
ELECTRICAL CHARACTERISTICS—Normal Supply Mode, TOL = VCCO

(VCCI= +4.75V to +5.5V, TOL = GND; or VCCI= +4.5V to +5.5V, TOL = VCCO; TA= TMINto TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Supply CurrentICCIVCCO, CEO open, VBATT1 = VBATT2 = 3V0.230.5mA
MXD1210CVCCI -
MXD1210EVCCI -
0.21Output Supply VoltageVCCOICCO1 = 80mA (Note 2)
MXD1210MVCCI -
MXD1210C80
MXD1210E0.2375Output Supply CurrentICCOVCCI - VCCO ≤ 0.2V (Note 2)
MXD1210M0.2365
Input Leakage CurrentIIL±1.0µA
Output Leakage CurrentIOL±1.0µA
High-Level Output VoltageVOHIOH = -1mA2.4V
Low-Level Output VoltageVOLIOL = 4mA0.4V
TOL = GND4.504.74VCCI Trip PointVCCTPTOL = VCCO4.254.49V
MXD1210
Nonvolatile RAM Controller
Note 1:
Only one battery input is required. Unused battery inputs must be grounded.
Note 2:
ICCO1is the maximum average load current the MXD1210 can supply to the memories.
Note 3:
ICCO2is the maximum average load current the MXD1210 can supply to the memories in battery-backup mode.
Note 4:
CEOcan sustain leakage current only in battery-backup mode.
Note 5:
Guaranteed by design.
Note 6:
tCEmax must be met to ensure data integrity on power loss.
ELECTRICAL CHARACTERISTICS—Battery-Backup Mode

(VCCI< VBATT, positive edge rate at VBATT1, VBATT2 > 0.1V/µs, TA= TMINto TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

MXD1210C/E2100nAQuiescent Current (Note 1)IBATTVCCO, CEO open,
VCCI = 0VMXD1210M5µA
Output Supply CurrentICCO2VBATT - VCCO ≤ 0.2V (Notes 3, 4)300µA
CEO Output VoltageVOOutput openVBATT -
0.2V
CAPACITANCE

(TA= TMINto TMAX, unless otherwise noted.) (Note 5)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Input CapacitanceCIN5pF
Output CapacitanceCOUT7pF
VCCPOWER TIMING CHARACTERISTICS

(VCCI= +4.75V to +5.5V, TOL = GND; or VCCI= +4.5V to +5.5V, TOL = VCCO, TA= TMINto TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

MXD1210C51020
MXD1210E51022CE Propagation DelaytPDRL = 1kΩ, CL = 50pF
MXD1210M51025
CE High to Power-FailtPF(Note 5)0ns
TIMING CHARACTERISTICS

(VCCI<+4.75V to +5.5V, TOL = GND; or VCCI<+4.5V, TOL = VCCO, TA= TMINto TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Recovery at Power-UptREC2520msTo out-of-tolerance condition300VCC Slew-Rate Power-DowntFBTolerance to battery power10µs
VCC Slew-Rate Power-UptR0µs
CE Pulse WidthtCE(Note 6)1.5µs
MXD1210
Nonvolatile RAM Controller
Pin Description
PIN
8-PIN PDIP/SO16-PIN WIDE SONAMEFUNCTION
VCCOBacked-Up Supply to RAM4VBATT1Battery 1 Positive Connection6TOLTolerance Select Pin8GNDGroundCEChip-Enable Input
611CEOChip-Enable Output13VBATT2Battery 2 Positive Connection
815VCCI5V Power Supply to Chip1, 3, 5, 7, 10, 12,
14, 16N.C.No Connection. Not internally connected.
VCCI
VCCO
GND
CEO
GND
FRESHNESS-
SEAL MODE
VOLTAGE LEVEL
DETECTION
BATTERY
TEST
BATTERY
SELECT
CEO
CONTROL
VBATT1
VBATT2
TOL
MXD1210
MXD1210
Nonvolatile RAM Controller
Detailed Description
Main Functions

The MXD1210 executes five main functions to perform
reliable RAM operation and battery backup (see the
Typical Operating Circuitand Figure 1):RAM Power-Supply Switch: The switch directs
power to the RAM from the incoming supply or
from the selected battery, whichever is at the
greater voltage. The switch control uses the same
criterion to direct power to MXD1210 internal cir-
cuitry.Power-Failure Detection: The write-protection
function is enabled when a power failure is
detected. The power-failure detection range
depends on the state of the TOL pin as follows:
Power-failure detection is independent of the bat-
tery-backup function and precedes it sequentially
as the power-supply voltage drops during a typi-
cal power failure.Write Protection: This holds the chip-enable out-
put (CEO) to within 0.2V of VCCIor of the selected
battery, whichever is greater. If the chip-enable
input (CE) is low (active) when power failure is
detected, then CEOis held low until CEis brought
high, at which time CEOis gated high for the
duration of the power failure. The preceding
sequence completes the current RD/WR cycle,
preventing data corruption if the RAM access is a
WR cycle.Battery Redundancy: A second battery is option-
al. When two batteries are connected, the
stronger battery is selected to provide RAM back-
up and to power the MXD1210. The battery-selec-
tion circuitry remains active while in the
battery-backup mode, selecting the stronger bat-
tery and isolating the weaker one. The battery-
selection activity is transparent to the user and
the system. If only one battery is connected, the
second battery input should be grounded.Battery-Status Warning: This notifies the system
when the stronger of the two batteries measures ≤
2.0V. Each time the MXD1210 is repowered (VCCIVCCTP) after detecting a power failure, the bat-
tery voltage is measured. If the battery in use is
low, following the MXD1210 recovery period, the
device issues a warning to the system by inhibit-
ing the second memory cycle. The sequence is
as follows:
First access: read memory location n, loc(n) = x
Second access: write memory location n,
loc(n) = complement (x)
Third access: read memory location n, loc(n) =
If the third access (read) is complement (x), then the
battery is good; otherwise the battery is not good.
Return to loc(n) = x following the test sequence.
Freshness-Seal Mode

The freshness-seal mode relates to battery longevity
during storage rather than directly to battery backup.
This mode is activated when the first battery is con-
nected, and is defeated when the voltage at VCCIfirst
exceeds VCCTP. In the freshness-seal mode, both bat-
teries are isolated from the system; that is, no current is
drained from either battery, and the RAM is not pow-
ered by either battery. This means that batteries can be
installed and the system can be held in inventory with-
out battery discharge. The positive edge rate at
VBATT1 and VBATT2 should exceed 0.1V/µs. The bat-
teries will maintain their full shelf life while installed in
the system.
Battery Backup

The Typical Operating Circuitshows the MXD1210 con-
nected to write-protect the RAM when VCCis less than
4.75V, and to provide battery backup to the supply.
CONDITIONVCCTP RANGE (V)

TOL = GND4.75 to 4.50
TOL = VCCO4.50 to 4.25
MXD1210
Nonvolatile RAM Controller

VIH
VIH
tPD
tREC
VBATT - 0.2V
VCCI
CEO
4.75V
4.5V
4.25V
Figure2. Power-Up Timing Diagram
VIH
VIH
VIL
VIL
tCE
tCE
tFB
tPF
tPD
VCCI
CEO
4.75V
4.5V
4.25V
VBATT - 0.2V
Figure3. Power-Down Timing Diagram
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