MPC9140 ,1:18 LVCMOS FANOUT BUFFERBlock DiagramTable 1. Pin DescriptionsPin Name I/O FunctionBUF_IN I 3.3V CMOS clock inputSDRAM0:17 ..
MPC9229 ,400 MHz Low Voltage PECL Clock SynthesizerLogic Diagram24 23 22 21 1925 2024 23 22 21 20 19 18 17S_CLOCKN[1]26 1825 16 NCGNDS_DATA N[0]27 172 ..
MPC9230 ,800 MHz Low Voltage PECL Clock Synthesizer
MPC9239EI , 900 MHz Low Voltage LVPECL Clock Synthesizer
MPC9239EI , 900 MHz Low Voltage LVPECL Clock Synthesizer
MPC930 ,LOW VOLTAGE PLL CLOCK DRIVERfeatures for power conscious portable or “green” designs. The power down pin willseemlessly reduce ..
MSP3460G , Multistandard Sound Processor Family
MSP3460G , Multistandard Sound Processor Family
MSP430AFE253IPWR ,16-bit Ultra-Low-Power Microcontroller, 16KB Flash, 512B RAM, 3x SD24 24-TSSOP -40 to 85FEATURES• Low Supply Voltage Range: 1.8 V to 3.6 V• Up to Three 24-Bit Sigma-DeltaAnalog-to-Digital ..
MSP430F1101 ,16-Bit Ultra-Low-Power Microcontroller, 1kB Flash, 128B RAM, Comparator 20-TSSOP -40 to 85featuresa powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to ma ..
MSP430F1101A ,16-bit Ultra-Low-Power Microcontroller, 1kB Flash, 128B RAM, Comparatorfeaturesa powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to ma ..
MSP430F1101AIDGV ,16-bit Ultra-Low-Power Microcontroller, 1kB Flash, 128B RAM, Comparatorfeaturesa powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to ma ..
MPC9140
1:18 LVCMOS FANOUT BUFFER
SEMICONDUCTOR TECHNICAL DATA-- -
The MPC9140 is a 1:18 LVCMOS fanout buffer targeted to support
Intel based Pentium II microprocessor chip sets. The device features
18 low skew outputs optimized to drive the clock inputs of standard
unbuffered SDRAM modules. Standard unbuffered SDRAM modules
require four clocks per module allowing for the device to drive up to four
modules. The output buffers have been optimized to drive the load
presented by the SDRAM module.
The MPC9140 provides output shut off capabilities via an I2C serial
port for applications which plan to use fewer than four modules and desire
to minimize the power dissipation of the chip. Every output clock can be
individually enabled/disabled through fields in the I2C control registers.
After power up the default state is all outputs enabled. In applications
where this default state is acceptable the I2C ports need not be exercised. Supports Intel Pentium and Pentium II Processor Architectures 18 Skew Controlled 3.3V Compatible SDRAM Clocks I2C Serial Bus Interface Extensive Output Enable Control Capability Space Efficient 48–Lead SSOP Package Operating Temperature Range of 0°C to 70°C 3.3V ± 5% Power Supply NCNC NCNC VDDVDD SDRAM15SDRAM0 SDRAM14SDRAM1 VSSVSS VDDVDD SDRAM13SDRAM2 SDRAM12SDRAM3 VSSVSS OEBUF_IN VDDVDD2 SDRAM11SDRAM4 SDRAM10SDRAM5 VSSVSS VDDVDD SDRAM9SDRAM6 SDRAM8SDRAM7 VSSVSS VDDVDD SDRAM17SDRAM16 VSSVSS VSSVDD SCLOCKSDATA
Figure 1. 48–Lead Pinout (Top View)
FUNCTION TABLE
