MM74C928N ,4-Digit Counters with MultiplexedFeaturesput latch, NPN output sourcing drivers for a 7-segment dis-play, and an internal multiplexi ..
MM74C93N ,4-Bit Binary CounterElectrical Characteristics” providesconditions for actual device operation.(Soldering, 10 seconds) ..
MM74C93N ,4-Bit Binary CounterFeaturesThe MM74C93 binary counter and complementary MOS
MM74C928N
4-Digit Counters with Multiplexed
MM74C925 • MM74C926 • MM74C927 • MM74C928 4-Digit Counters with Multiplexed 7-Segment Output Drivers October 1987 Revised January 1999 MM74C925 • MM74C926 • MM74C927 • MM74C928 4-Digit Counters with Multiplexed 7-Segment Output Drivers back LOW only when the counter is reset. Thus, this is a General Description 3½-digit counter. The MM74C925, MM74C926, MM74C927 and MM74C928 CMOS counters consist of a 4-digit counter, an internal out- Features put latch, NPN output sourcing drivers for a 7-segment dis- play, and an internal multiplexing circuitry with four � Wide supply voltage range: 3V to 6V multiplexing outputs. The multiplexing circuit has its own � Guaranteed noise margin: 1V free-running oscillator, and requires no external clock. The � High noise immunity: 0.45 V (typ.) CC counters advance on negative edge of clock. A HIGH sig- � High segment sourcing current: 40 mA nal on the Reset input will reset the counter to zero, and reset the carry-out LOW. A LOW signal on the Latch @ V − 1.6V, V = 5V CC CC Enable input will latch the number in the counters into the � Internal multiplexing circuitry internal output latches. A HIGH signal on Display Select input will select the number in the counter to be displayed; Design Considerations a LOW level signal on the Display Select will select the number in the output latch to be displayed. Segment resistors are desirable to minimize power dissipa- tion and chip heating. The DS75492 serves as a good digit The MM74C925 is a 4-decade counter and has Latch driver when it is desired to drive bright displays. When Enable, Clock and Reset inputs. using this driver with a 5V supply at room temperature, the The MM74C926 is like the MM74C925 except that it has a display can be driven without segment resistors to full illu- display select and a carry-out used for cascading counters. mination. The user must use caution in this mode however, The carry-out signal goes HIGH at 6000, goes back LOW to prevent overheating of the device by using too high a at 0000. supply voltage or by operating at high ambient tempera- The MM74C927 is like the MM74C926 except the second tures. most significant digit divides by 6 rather than 10. Thus, if The input protection circuitry consists of a series resistor, the clock input frequency is 10 Hz, the display would read and a diode to ground. Thus input signals exceeding V CC tenths of seconds and minutes (i.e., 9:59.9). will not be clamped. This input signal should not be allowed The MM74C928 is like the MM74C926 except the most sig- to exceed 15V. nificant digit divides by 2 rather than 10 and the carry-out is an overflow indicator which is HIGH at 2000, and it goes Ordering Code: Order Number Package Number Package Description MM74C925N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide MM74C926N N18A 18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide MM74C927N N18A 18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide MM74C928N N18A 18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide © 1999 DS005919.prf
