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MM5456NN/a2000avaiDIGITAL ALARM CLOCKS
MM5457NN/a194avaiDIGITAL ALARM CLOCKS
MM5457NNSN/a185avaiDIGITAL ALARM CLOCKS
MM5457NNSCN/a378avaiDIGITAL ALARM CLOCKS


MM5456N ,DIGITAL ALARM CLOCKSFunctional Description 50 or 60 Hz tnput:A shaping circuit is provided inter- nally to- sqqare ..
MM5457N ,DIGITAL ALARM CLOCKSAbsolute Maximum Ratings (Exceeding the following ratings may result in pemianent démége to the dev ..
MM5457N ,DIGITAL ALARM CLOCKSFunctional Description 50 or 60 Hz tnput:A shaping circuit is provided inter- nally to- sqqare ..
MM5457N ,DIGITAL ALARM CLOCKSElectrical Characteristics Power supply voltage should not exceed a maximum of 12V under any circum ..
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MM5456N-MM5457N
DIGITAL ALARM CLOCKS
MM5456, mmeasr _;~:
National
Semiconductor
Digital: Clocks _'.
iausssd,iaususr" Digital Alarm Clocks
General Description
The MM5456, 57 digital alarm clock radio chips
are monolithié MO: integrated circuits utilizing N-chan.
nel, low threshold, enhancement mode and ion-im-
planted depletion mode devices.
Each circuit contains all the logic necessary fora digital
clock with sleep and alarm control and is intended for
clock-radio applications.
Real time and alarm time are displayed in hours-minutes
and sleep time is displayed in minutes. when setting
the sleep counter.
An alarm output is provided that "beeps" a 50% duty
cycle, 700 Hz signal gated at 2 Hz rate' when the alarm
set time and the real time matches. A sleep output
that provides a DC level is used to control the radio.
It is activated with the alarm output or programmed
via the sleep counter to turn OFF from 0 to 59 minutes
after the sleep counter is set.
The M'NN45ts, MM5457 are bonded in a 22-pin package.
The MMS457 has a 24-hour/50 Hz option and the
MM5456 has the 12-hour/50 Hz or 12-h0ur/60 Hz
options.
Features
Duplex LED display drive
Fast/slow set capability
24-hour alaim
"Snooze" function (9 minutes)
On-chip alarm oscillator
Alarm tone output gated at a 2 Hz rate
indication-entire display flashes at a
Power fail
1 Hz rate
Automatic power-on reset
PM display indicator
II Presettable 59 minute sleep timer
A snooze feature is provided for a 9-minute recurrence Applications
of the alarm after ithas sounded. _ " Alarm clocks
. . . l Desk clocks
Setting. IS done ya the standard fast and slow set buttons . '' Clock radios
when in the time set, alarm set or sleep set modes. I: A bil I k
These control inputs are TRI-STATE® inputs to reduce utomo l e c oc s
pin count. I Stopwatches
. I Industrial clocks
The 50/60 Hz clock selects what segment data is on '' Portable clocks
the outputs, Le, a duplex LED display interface. I Timers
Block Diagram mm _
esn on _ REAL TIME _
Hn a comma T
I " " SEGMENT tiumns
SLEEP couumz 'lirtlll'l'lt s-o wnsass: 12 OUTPUTS
' couunnnn W569: 13 OUTPUTS
snooze Lucie
ALARM couursn "
TIME smnuu/ o t tr. +-o Vnn
ALARM SET I
FAST sn/nuu/ O F cormmL
Slow sat t l H v3
ac ALAmnm sun ALARM
ALARM am out run: our
SLEEP SET
5:" y'. .,'rr, ir'.?
_ e"“mm”???:‘dflmemlwéweezwzimws '" _ _ ,
Voltage at Any Pin
Operating Temperature
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
Vss to Vss +12V
-25°C to +70°C
Hi5"C to +150°c
Electrical Characteristics Power supply voltage should not exceed a maximum of 12V under any circumstances.
TA within operating range. VDD = 7V to 11V
Absolute Maximum Ratings (Exceeding the following ratings may result in pemianent dimige to the device) iii
PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supply Voltage Output Driving Display 9 11 V
Functional _ Count Operating 7 11 V
Power Supply Current No Output Loads
VDD = 7V 4 mA
VDD = 11V 5 mA
50/60 Hz Input Frequency DC f0/60 10k Hz
Logical "O'', Low Level vss vss Vss+0.5 V
Logical "I'', High Level 0.7 VDD V00 V00 V
Input Leakage VIN = VDD or Vss T 10 PA
All Other Input Voltages
Logical "O'', Low Level vss vss VSS+0.5 V
Logical "I'', High Level V00" VDD VDD V
Power Failure Detect Voltage (VDD Voltage) 1 5
Alarm Output, Sleep Output VDD = 11V
Sourcing, Logical "1" High VOH = VDD -- 1V 1 PA
Sinking, Logical "O'' Low VOL = vss + 6V 5 mA
Alarm Output Frequency R = 68k, C = 0.1PF 700 Hz
Segment Outputs (Except VDD = 10V
HTADEG)
Output Sink, Logical "0" Low VOL = Vss + 2V 20 mA
Leakage, Logical "1" High VOH = VDD 10 pA
Segment Output (HTADEG) VDD = 10V
Output Sink, Logical "0" Low VOL = vss + 2V 40 mA
Leakage, Logical "1" High VOH = V00 10 PA
Functional Description
50 or 60 He InputzA shaping circuit is provided inter-
nally to- sqqare the 50 or 60 Hz input. This circuit
allows use of a half sinewave input. A resistor in series
must be used to limit current into the MOS device.
24-Hour/50 Hz, 12-Hour/60 Hz. 12-Hour/50 Hz
(MM5456): When this input is connected to VDD,. the
display will be 12 hours with 50 Hz input. If left floating,
the display will be 12 hours with 60 Hz input. (The
MM5457 is internally bonded to select the 24-hour/50
Hz mode. The MM5456 selects the 12-hour/50 Hz or the
12-hour/60 Hz modes.)
Sleep Set/Aiarm Enabla/Alarm OFF: Whenever this
input is connected to Vss, the sleep counters will
display and be set to 59 minutes, if previously at M
minutes. Fast set or slow set may be used to preset
time other than 59 minutes. When the alarm sounds,
the snooze can be activated by momentarily con-
necting fast set pirr,to VDD. This will turn off the
alarm for 9-10 minutes, after which the alarm will
again be sounded. The snooze alarm feature may be
repeatedly' used for up to 69 minutes or until alarm
OFF is activated by momentarily connecting this pin
to VOD. When alarm OFF is activated, the alarm latch
will reset and silence the alarm. The alarm will auto.
matically sound again in 24 hours (or at a new alarm
setting). If it is desired to' silence the alarm for a day
or more, the alarm OFF‘input should remain at VDD.
The alarm can be enabled again by allowing the input
to float.
External RC: The resistor and capacitor on this pin
set the frequency of the alarm tone. The frequency is
" 4.7; . st, i',
“I.WEE:
T _'rc,, '.tie89W''r%'i,F'?'yt.'b'ejr'" :' 'fer''r'/'p,rWts';TaNWW' rr',- , _
,MMSHST
. Functional Description (Continued)
nominally set to 1400 Hz in order to produce a 700 Hz
(50% duty cycle) tone at the alarm output.
Time Set/Run/Alarm Set: This input must be activated
in order to set the time counter and alarm counter. When
connected to VDD, the time counter will be displayed
and may be set with the fast-slow input. Upon release
of fast and slow set, the time counter will be in a hold
mode. If time set/alarm set is left floating, the time
counter will be displayed, and the fast-slow input will
be disabled (normal run mode). When this input is con-
nected to vss, the alarm counter will be displayed
and may be set with the fast-slow input.
Fast Set/Run/Slow Set: Whenever this input is con-
nected to VDD and time set or alarm set is activated,
the appropriate counter will advance at a 60 Hz rate.
If connected to Vss,the minutes counter will advance
at 2 Hz with carry into the hours counter. If left floating,
the clock will keep normal time. When connected to
VDD and sleep set is activated, the sleep counter will
count downward at a 10 Hz rate. If connected to vss,
the sleep counter will count downward at the slower
rate; 2 Hz.
Alarm Output: This output remains at VDD when inac.
tive. When the alarm latch becomes set, the alarm
Typical Application
700 Hz tone will be gated by a 20% duty cycle 2 Hz
signal (i.e., the alarm tone will be ON far 100 ms and
OFF for 400 ms). This output contains an internal
pull-up to VDD in order to turn OFF the external
PNP transistor driver when the alarm is inactive.
Sleep Output: This output. remains at VDD when
inactive. When the alarm latch becomes set or the sleep
counter is at other than 00 minutes, the sleep output
will be ON. Snooze or alarm OFF function will dis-
able this output simultaneously with alarm output
if activated by alarm latch. Snooze function will disable
this output at any time if activated by sleep counter
being set. This output contains an internal pull-up
to VDD in order to turn OFF the external PNP trans-
istor switch when the output is inactive.
Segment Outputs: All segment outputs are open-drain
devices with all sources common to vss. '
Power ON and Power Failure: After power ON or
power fail, the display will flash at 1 Hz rate and time,
alarm, and seconds counters will be reset to 0:00:00
(12:00:00). The alarm output will be held OFF also.
The power fail can be reset by enabling time set allow.
DUPLEX DISPLAY
ACINPUT _ c=, l:
T'." Mi , [7:1 , [7
2w [:3
'21 ll l, l, ls Is l, II la " In he
50mm SLEEP
" mvut SLEE' our BRWE
- mac Mmsm
0.0qu ALARM
mus'out tttttttE
- v' i
" no .
mat " ALARM sun l? ALARM FAST 13 stow
It/till
12/50 l
f-". ' l-
SET snooze v00
IIl-ll-
1 trtk+ _
I 25VDC
“5"- 1'91trN.aNtFib'P, _
Connection Diagrams (Dual-In-Line Packages, Top Views)
12-HourI50 or 60 Hz Clock
HUB. HUG - 1 tt - urn. m
ttoc, HUD - 2 " - mc. ME
HUA. "OF-s a to T"" SLEEP om
Vss - 4 _ lil - 12/60. 12/50
MTF, 1m -." 5 " - 50/50 ttt mm
ma. 1m --- s mums " -- 'lltlhS'""' tlllf
mu. MTC--- T " _ EXT. M
ms. MOE - a " f""" van
mun. Mot; -- g " 'r- TIME smnuu/Aunu SET
Moth mun - IO " - FAST SET (StttWEVttilt08L0W 3:1
MUA, mu; - 11 12 --- ALARM 1011: our
Order Number MMMSGN
See Package 22
24~Hourl50 Hz Clock
HUB. Hotl-t tt --tml, m
HUC, Roll - t 21 - moss
HUA, MIF-i a 20 -a. Hm. ME
vss -, 4 19 - SLEEP our
MTF, MTA--, 5 " - 50 tit mm
1m. 1m - a MM5457 17 - Ydl'sT"'" 011/
M10. MTC-e T 1s - EXT. at:
me. MOE-- a " -etm
- mus. MUG - ' " - TIME sn/nuumunu SET
mun. Moo - 1o " - FAST SET ($MmtEVtt1m/8Lthe SET
MOA, M0F- 11 It --liurm rousour "
Order Number MM54S7N
See Package 22
This datasheet has been :
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Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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This file is the datasheet for the following electronic components:
MM5457 - product/mm5457?HQS=T|-nu||-nu|I-dscataIog-df-pf-null-wwe
MM5456 - product/mm5456?HQS=T|-nu||-nu|I-dscatalog-df—pf-nulI-wwe
MM5457N - product/mm5457n?HQS=TI-nuII-nulI-dscatalog-df-pf-null-wwe
MM5456N - product/mm5456n?HQS=T|-nu|I-nuII-dscatalog-df-pf-nuII-wwe
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