MLT04GS Fast Delivery |IC PHOENIX CO.,LIMITED

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MLT04GS
Four-Channel, Four-Quadrant Analog Multiplier
FUNCTIONAL BLOCK DIAGRAM
18-Lead Epoxy DIP (P Suffix)
18-Lead Wide Body SOIC (S Suffix)
GENERAL DESCRIPTION
The MLT04 is a complete, four-channel, voltage output analog
multiplier packaged in an 18-pin DIP or SOIC-18. These complete
multipliers are ideal for general purpose applications such as voltage
controlled amplifiers, variable active filters, “zipper” noise free
audio level adjustment, and automatic gain control. Other applica-
tions include cost-effective multiple-channel power calculations×V), polynomial correction generation, and low frequency
modulation. The MLT04 multiplier is ideally suited for generating
complex, high-order waveforms especially suitable for geometry
correction in high-resolution CRT display systems.
FEATURES
Four Independent Channels
Voltage IN, Voltage OUT
No External Parts Required
8 MHz Bandwidth
Four-Quadrant Multiplication
Voltage Output; W = (X × Y)/2.5 V
0.2% Typical Linearity Error on X or Y Inputs
Excellent Temperature Stability: 0.005%
±2.5 V Analog Input Range
Operates from ±5 V Supplies
Low Power Dissipation: 150 mW typ
Spice Model Available
APPLICATIONS
Geometry Correction in High-Resolution CRT Displays
Waveform Modulation & Generation
Voltage Controlled Amplifiers
Automatic Gain Control
Modulation and Demodulation
Fabricated in a complementary bipolar process, the MLT04
includes four 4-quadrant multiplying cells which have been laser-
trimmed for accuracy. A precision internal bandgap reference
normalizes signal computation to a 0.4 scale factor. Drift over
temperature is under 0.005%/°C. Spot noise voltage of 0.3 μV/√Hz
results in a THD + Noise performance of 0.02% (LPF = 22 kHz)
for the lower distortion Y channel. The four 8 MHz channels
consume a total of 150 mW of quiescent power.
The MLT04 is available in 18-pin plastic DIP, and SOIC-18
surface mount packages. All parts are offered in the extended
industrial temperature range (–40°C to +85°C).
Figure 2.THD + Noise vs. FrequencyFigure 1.Gain & Phase vs. Frequency Response
0.011001M100k10k1k
FREQUENCY – Hz
THD + NOISE – %
Four-Channel, Four-Quadrant
Analog Multiplier
ORDERING INFORMATION*
*For die specifications contact your local Analog sales office. The MLT04
contains 211 transistors.
(VCC = +5 V, VEE = –5 V, VIN = ±2.5 VP, RL = 2 kΩ, TA = +25°C unless otherwise noted.)
MLT04–SPECIFICATIONS
NOTESSpecifications apply to all four multipliers.Error is measured as a percent of the ±2.5 V full scale, i.e., 1% FS = 25 mV.Scale Factor K is an internally set constant in the multiplier transfer equation W = K × X × Y.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltages VCC, VEE to GND±7 V
Inputs XI, YIVCC, VEE
Outputs WIVCC, VEE
Operating Temperature Range–40°C to +85°C
Maximum Junction Temperature (TJ max)+150°C
Storage Temperature–65°C to +150°C
Lead Temperature (Soldering, 10 sec)+300°C
Package Power Dissipation(TJmax–TA)/θJA
Thermal Resistance θJA
PDIP-18 (N-18)74°C/W
FUNCTIONAL DESCRIPTION
The MLT04 is a low cost quad, 4-quadrant analog multiplier with
single-ended voltage inputs and voltage outputs. The functional
block diagram for each of the multipliers is illustrated in Figure 3.
Due to packaging constraints, access to internal nodes for externally
adjusting scale factor, output offset voltage, or additional summing
signals is not provided.
Figure 3.Functional Block Diagram of Each MLT04
Multiplier
Each of the MLT04’s analog multipliers is based on a Gilbert cell
multiplier configuration, a 1.23 V bandgap reference, and a unity-
connected output amplifier. Multiplier scale factor is determined
through a differential pair/trimmable resistor network external to
the core. An equivalent circuit for each of the multipliers is shown
in Figure 4.
Figure 4.Equivalent Circuit for the MLT04
Details of each multiplier’s output-stage amplifier are shown in
Figure 5. The output stages idles at 200 μA, and the resistors in
series with the emitters of the output stage are 25 Ω. The output
stage can drive load capacitances up to 500 pF without oscillation.
For loads greater than 500 pF, the outputs of the MLT04 should
be isolated from the load capacitance with a 100 Ω resistor.
ANALOG MULTIPLIER ERROR SOURCES
Multiplier errors consist primarily of input and output offsets, scale
factor errors, and nonlinearity in the multiplying core. An expres-
sion for the output of a real analog multiplier is given by: VO=(K+ΔK){(VX+XOS)(VY+YOS)+ZOS+ f(X,Y)}
where:K=Multiplier Scale Factor=Scale Factor ErrorX=X-Input SignalOS=X-Input Offset VoltageY=Y-Input SignalOS=Y-Input Offset VoltageOS=Multiplier Output Offset Voltage
ƒ(X, Y)=Nonlinearity
Executing the algebra to simplify the above expression yields
expressions for all the errors in an analog multiplier:
As shown in the table, the primary static errors in an analog
multiplier are input offset voltages, output offset voltage, scale
factor, and nonlinearity. Of the four sources of error, only two are
externally trimmable in the MLT04: the X- and Y-input offset
voltages. Output offset voltage in the MLT04 is factory-trimmed to
±50 mV, and the scale factor is internally adjusted to ±2.5% of full
scale. Input offset voltage errors can be eliminated by using the
optional trim circuit of Figure 6. This scheme then reduces the net
error to output offset, scale-factor (gain) error, and an irreducible
nonlinearity component in the multiplying core.
Figure 6.Optional Offset Voltage Trim Configuration
VCC
OUT
25Ω
25Ω
VCC
INTERNAL
BIAS
XIN
GND
YIN
VEE
OUTSS
X1, X2, X3, X4
G1, G2, G3, G4
Y1, Y2, Y3, Y4
W1, W2, W3, W4
Feedthrough
In the ideal case, the output of the multiplier should be zero if
either input is zero. In reality, some portion of the nonzero input
will “feedthrough” the multiplier and appear at the output. This is
caused by the product of the nonzero input and the offset voltage of
the “zero” input. Introducing an offset equal to and opposite of the
“zero” input offset voltage will null the linear component of the
feedthrough. Residual feedthrough at the output of the multiplier
is then irreducible core nonlinearity.
Typical X- and Y-input feedthrough curves for the MLT04 are
shown in Figures 7 and 8, respectively. These curves illustrate
MLT04 feedthrough after “zero” input offset voltage trim.
Residual X-input feedthrough measures 0.08% of full scale,
whereas residual Y-input feedthrough is almost immeasurable.
Figure 7.X-Input Feedthrough with YOS Nulled
Figure 8.Y-Input Feedthrough with XOS Nulled
Nonlinearity
Multiplier core nonlinearity is the irreducible component of error.
It is the difference between actual performance and “best-straight-
line” theoretical output, for all pairs of input values. It is expressed
as a percentage of full scale with all other dc errors nulled. Typical
X- and Y-input nonlinearities for the MLT04 are shown in Figures
9 through 12. Worst-case X-input nonlinearity measured less than
0.2%, and Y-input nonlinearity measured better than 0.06%. For
modulator/demodulator or mixer applications it is, therefore,
recommended that the carrier be connected to the X-input while
the signal is applied to the Y-input.
Figure 10.X-Input Nonlinearity @ Y = –2.5 V
Figure 11.Y-Input Nonlinearity @ X = +2.5 V
MLT04
Figure 9.X-Input Nonlinearity @ Y = +2.5 V
VERTICAL – 5mV/DIV
HORIZONTAL – 0.5V/DIV
VERTICAL – 5mV/DIV
HORIZONTAL – 0.5V/DIV
VERTICAL – 5mV/DIV
HORIZONTAL – 0.5V/DIV
VERTICAL – 5mV/DIV
HORIZONTAL – 0.5V/DIV
VERTICAL – 5mV/DIV
HORIZONTAL – 0.5V/DIV
VERTICAL – 5mV/DIV
HORIZONTAL – 0.5V/DIV
Figure 16.X-Input Gain and Phase vs. Frequency
NOISE DENSITY – nV/

FREQUENCY – Hz1001M100k10k1k
10k100k10M1M
135
FREQUENCY – Hz
GAIN
–dB
PHASE – Degrees
Figure 13.Broadband Noise
OUTPUT NOISE VOLTAGE – 100µV/DIV
TIME = 10ms/DIV
Figure 14.Broadband Noise
OUTPUT NOISE VOLTAGE – 625µV/DIV
TIME = 10ms/DIV
Figure 19.Feedthrough vs. Frequency
Figure 20.Crosstalk vs. Frequency
Figure 21.Gain Flatness vs. Frequency
10k3M1M100k1k
FEEDTHROUGH – dB
FREQUENCY – Hz
10k10M1M100k1k
CROSSTALK – dB
FREQUENCY – Hz
–3.010k100M10M1M100k
FREQUENCY – Hz
AV GAIN – dB
VERTICAL – 50mV/DIV
TIME – 100ns/DIV
VERTICAL – 1V/DIV
Figure 22.Y-Input Small-Signal Transient Response,L = 30pF
Figure 23.Y-Input Small-Signal Transient Response,L = 100pF
Figure 24.Y-Input Large-Signal Transient Re-
sponse, CL = 30pF

Partno	Mfg	Dc	Qty	Available	Descript
MLT04GS	ADI	N/a	14	avai	Four-Channel, Four-Quadrant Analog Multiplier