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MC74HC76NMOTN/a9avaiDual JK Flip-Flop With Set and Reset


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MC74HC76N
Dual JK Flip-Flop With Set and Reset
SEMICONDUCTOR TECHNICAL DATA - -
High–Performance Silicon–Gate CMOS

The MC74HC76 is identical in pinout to the LS76. The device inputs
are compatible with Standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
Each flip–flop is negative–edge clocked and has active–low asynchro-
nous Set and Reset inputs.
The HC76 is identical in function to the HC112, but has a different
pinout. Similar in Function to the LS76 Except When Set and Reset Are
Low Simultaneously
Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2 to 6V Low Input Current: 1μA High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 100 FET s or 25 Equivalent GatesQ1Set1
PIN 5 = VCC
PIN 13 = GND
LOGIC DIAGRAM
K1Clock1J1Reset1Q1Q2Set2K2Clock2J2Reset2Q2
FUNCTION TABLE
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