MC74HC573AF ,Octal 3-State NonInverting Transparent Latchthey are compatible with LSTTL outputs.These latches appear transparent to data (i.e., the outputs ..
MC74HC573AF ,Octal 3-State NonInverting Transparent LatchELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6.0 ns)L r fÎÎGuaranteed LimitÎÎÎÎÎÎV – 55 toC ..
MC74HC573AFEL ,Octal 3-State NonInverting Transparent LatchLOGIC DIAGRAM Figure 2. PIN ASSIGNMENTFUNCTION TABLEInputs OutputOutput LatchEnable Enable D QLH H ..
MC74HC573AN ,Octal 3-State Noninverting Transparent LatchELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Guaranteed LimitÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ V ..
MC74HC574A ,Octal 3-State NonInverting Flip-FlopMC74HC574AOctal 3-State NoninvertingD Flip-FlopHigh–Performance Silicon–Gate CMOSThe MC74HC574A is ..
MC74HC574ADTR2 ,Octal 3-State NonInverting Flip-Flopresistors, they are compatible with LSTTL outputs.Data meeting the set–up time is clocked to the ou ..
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MC74HC573AF
Octal 3-State NonInverting Transparent Latch
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High–Performance Silicon–Gate CMOSThe MC74HC573A is identical in pinout to the LS573. The devices
are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
The HC573A is identical in function to the HC373A but has the data
inputs on the opposite side of the package from the outputs to facilitate
PC board layout. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating V oltage Range: 2.0 to 6.0 V Low Input Current: 1.0 μA In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 218 FETs or 54.5 Equivalent Gates
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MARKING
DIAGRAMS = Assembly Location = Wafer Lot = Year = Work Week
SOIC WIDE–20
DW SUFFIX
CASE 751D
PDIP–20
N SUFFIX
CASE 738
TSSOP–20
DT SUFFIX
CASE 948E
ORDERING INFORMATION
