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MC74HC139AN/a554avaiDecoder
MC74HC139AMOTN/a1169avaiDecoder
MC74HC139ADR2ONN/a32500avaiDecoder
MC74HC139ADTR2ONN/a2500avaiDecoder
MC74HC139AFELMOTN/a80avaiDecoder
MC74HC139ANN/a298avaiDual 1-of-4 Decoder/Demultiplexer


MC74HC139ADR2 ,DecoderMC74HC139ADual 1-of-4 Decoder/DemultiplexerHigh–Performance Silicon–Gate CMOSThe MC74HC139A is iden ..
MC74HC139ADTR2 ,Decoderhttp://onsemi.com3MC74HC139ADC
MC74HC139AFEL ,Decoderhttp://onsemi.comresistors, they are compatible with LSTTL outputs.This device consists of two inde ..
MC74HC139AFL1 ,Dual 1-of-4 Decoder/Demultiplexerresistors, they are compatible with LSTTL outputs.MARKINGThis device consists of two independent 1– ..
MC74HC139AFL2 ,Dual 1-of-4 Decoder/DemultiplexerELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)ÎÎÎGuaranteed LimitÎV – 55 toCCÎÎÎ SymbolÎÎ ..
MC74HC139AFR2 ,Dual 1-of-4 Decoder/DemultiplexerMaximum Ratings are those values beyond which damage to the device may occur.Functional operation s ..
MCR68-2 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value Unit(1)Peak Repetitive Off–St ..
MCR68-2 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
MCR69-2 ,Silicon Controlled RectifiersMaximum ratings applied to the device are individual stress limit values (notORDERING INFORMATIONno ..
MCR69-2 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value UnitMARKINGPeak Repetitive Of ..
MCR69-3 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
MCR703A ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)CCharacteristic Symbol Min Typ Max Unit ..


MC74HC139A-MC74HC139ADR2-MC74HC139ADTR2-MC74HC139AFEL-MC74HC139AN
Decoder
MC74HC139A
Dual 1-of-4 Decoder/
Demultiplexer
High–Performance Silicon–Gate CMOS

The MC74HC139A is identical in pinout to the LS139. The device
inputs are compatible with standard CMOS outputs; with pull–up
resistors, they are compatible with LSTTL outputs.
This device consists of two independent 1–of–4 decoders, each of
which decodes a two–bit Address to one–of–four active–low outputs.
Active–low Selects are provided to facilitate the demultiplexing and
cascading functions. The demultiplexing function is accomplished by
using the Address inputs to select the desired device output, and
utilizing the Select as a data input. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 100 FETs or 25 Equivalent Gates
Figure 1. Pin Assignment

SELECTa
A1a
A0a
GND
A1b
A0b
SELECTb
VCC
Y0a
Y1a
Y2a
Y3a
Y0b
Y1b
Y2b
Y3b
FUNCTION TABLE

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