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MC14531BCLN/a37avai12-Bit Parity Tree
MC14531BCLMOT?N/a100avai12-Bit Parity Tree
MC14531BCLMOTN/a37avai12-Bit Parity Tree
MC14531BCPMOTOROLAN/a11avai12-Bit Parity Tree


MC14531BCL ,12-Bit Parity Tree**SEMICONDUCTOR TECHNICAL DATA** *L SUFFIXThe MC14531B 12–bit parity tree is constructed with MOS ..
MC14531BCL ,12-Bit Parity TreeLOGIC DIAGRAM0 0 0 … 0 1 0 2 (2) 10 0 0 … 0 1 1 3 (3) 0D0 70 0 0 … 1 0 0 4 (4) 10 0 0 … 1 0 1 5 (5) ..
MC14531BCL ,12-Bit Parity TreeLOGIC DIAGRAM0 0 0 … 0 1 0 2 (2) 10 0 0 … 0 1 1 3 (3) 0D0 70 0 0 … 1 0 0 4 (4) 10 0 0 … 1 0 1 5 (5) ..
MC14531BCP ,12-Bit Parity TreeMAXIMUM RATINGS* (Voltages Referenced to V )SSÎÎSymbol Parameter Value UnitÎÎÎÎÎV DC Supply Voltage ..
MC14532 ,8-Bit Priority EncoderMAXIMUM RATINGS* (Voltages Referenced to V )SSCASE 751BSymbol Parameter Value UnitORDERING INFORMAT ..
MC14532B ,8-Bit Priority Encoderhttp://onsemi.com3MC14532B(7.)ÎÎÎÎÎ SWITCHING CHARACTERISTICS (C = 50 pF, T = 25C)L A(8.)ÎÎÎÎÎ Ch ..
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MC68HC908QY1CP ,High-performance M68HC08 family of 8-bit microcontroller units (MCUs), (CISC) with a von neumann architecture, FLASH memory 1536 bytes.
MC68HC908QY2CDT ,High-performance M68HC08 family of 8-bit microcontroller units (MCUs), (CISC) with a von neumann architecture, FLASH memory 1536 bytes, ADC
MC68HC908QY2CDT ,High-performance M68HC08 family of 8-bit microcontroller units (MCUs), (CISC) with a von neumann architecture, FLASH memory 1536 bytes, ADC
MC68HC908QY2CDT ,High-performance M68HC08 family of 8-bit microcontroller units (MCUs), (CISC) with a von neumann architecture, FLASH memory 1536 bytes, ADC
MC68HC908QY2CP ,High-performance M68HC08 family of 8-bit microcontroller units (MCUs), (CISC) with a von neumann architecture, FLASH memory 1536 bytes, ADC


MC14531BCL-MC14531BCP
12-Bit Parity Tree
-The MC14531B 12–bit parity tree is constructed with MOS P–channel and
N–channel enhancement mode devices in a single monolithic structure. The
circuit consists of 12 data–bit inputs (D0 thru D11), and even or odd parity
selection input (W) and an output (Q). The parity selection input can be
considered as an additional bit. Words of less than 13 bits can generate an
even or odd parity output if the remaining inputs are selected to contain an
even or odd number of ones, respectively. Words of greater than 12–bits can
be accommodated by cascading other MC14531B devices by using the W
input. Applications include checking or including a redundant (parity) bit to a
word for error detection/correction systems, controller for remote digital
sensors or switches (digital event detection/correction), or as a multiple input
summer without carries. Supply Voltage Range = 3.0 Vdc to 18 Vdc All Outputs Buffered Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range Variable Word Length Diode Protection on All Inputs
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ÎÎÎ Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125C
LOGIC DIAGRAM

Q = D0 D1 D2 - D11 W
VDD = PIN 16
VSS = PIN 8
D10
D11
ODD/EVEN WQ
SEMICONDUCTOR TECHNICAL DATA
TRUTH TABLE

*0 = Even Parity 1 = Odd Parity
NOTE:May redefine to suit application by manipulating W and/or other
available D’s.
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