MC14174BD ,Hex Type D Flip-FlopELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ – 55* CÎÎ 25* CÎÎÎÎÎ 125* CÎÎÎV VDD ..
MC14174BD ,Hex Type D Flip-Flop3MC14174B(7.)ÎÎÎÎÎ SWITCHING CHARACTERISTICS (C = 50 pF, T = 25* C) L AAll TypesVDD DD(8.)VdcChar ..
MC14175B ,Quad D-Type Flip FlopMaximum Ratings are those values beyond which damage to the deviceMC14175BDR2 SOIC–16 2500/Tape & R ..
MC14175BCP ,Quad D-Type Flip FlopMC14175BQuad Type D Flip-FlopThe MC14175B quad type D flip–flop is constructed with MOSP–channel an ..
MC14175BCP. ,Quad D-Type Flip Flop2MC14175BÎÎÎÎÎ
MC14175BD ,Quad D-Type Flip FlopELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ – 55CÎÎ 25CÎÎÎÎÎ 125CÎÎÎV VDD DD( ..
MC68HC11E1 , 8-channel, 8-bit analog-to-digital (A/D) converter
MC68HC11E1CFN2 ,Microcontrollers Freescale Semiconductor, Inc.M68HC11E FamilyData SheetM68HC11MicrocontrollersM68HC11E/DRev. 56/ ..
MC68HC11E1CFN3 ,Microcontrollers Freescale Semiconductor, Inc.M68HC11E FamilyData SheetM68HC11MicrocontrollersM68HC11E/DRev. 56/ ..
MC68HC11E1CFNE2 , Microcontrollers
MC68HC11E1CFNE2 , Microcontrollers
MC68HC11E1CFNE2 , Microcontrollers
MC14174BD
Hex Type D Flip-Flop
---The MC14174B hex type D flip–flop is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. Data on the D inputs which meets the setup time
requirements is transferred to the Q outputs on the positive edge of the
clock pulse. All six flip–flops share common clock and reset inputs.
The reset is active low, and independent of the clock. Static Operation All Inputs and Outputs Buffered Diode Protection on All Inputs Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load over the Rated Temperature Range Functional Equivalent to TTL 74174
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) Maximum Ratings are those values beyond which damage to the device
may occur. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
