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MC14049UBCPMOTON/a152avaiHex Inverting Buffer


MC14049UBCP ,Hex Inverting Buffer2MC14049UBÎÎÎÎÎ SWITCHING CHARACTERISTICS (Note 5) (C = 50 pF, T = 25C)L AÎ CharacteristicÎÎÎÎ Sym ..
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MC14049UBCP
Hex Inverting Buffer
MC14049UB
Hex Buffers
The MC14049UB hex inverter/buffer is constructed with MOS
P−channel and N−channel enhancement mode devices in a single
monolithic structure. This complementary MOS device finds primary
use where low power dissipation and/or high noise immunity is
desired. This device provides logic−level conversion using only one
supply voltage, VDD. The input−signal high level (VIH) can exceed the
VDD supply voltage for logic−level conversions. Two TTL/DTL
Loads can be driven when the device is used as CMOS−to−TTL/DTL
converters (VDD = 5.0 V , VOL � 0.4 V , IOL ≥ 3.2 mA). Note that pins
13 and 16 are not connected internally on this device; consequently
connections to these terminals will not affect circuit operation.
Features
High Source and Sink Currents High−to−Low Level Converter Supply Voltage Range = 3.0 V to 18 V Meets JEDEC UB Specifications VIN can exceed VDD Improved ESD Protection on All Inputs Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)

Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected. Temperature Derating: All Packages: See Figure 4.
This device contains circuitry to protect the inputs against damage due to high
static voltages or electric fields referenced to the VSS pin, only. Extra precautions
must be taken to avoid applications of any voltage higher than the maximum rated
voltages to this high−impedance circuit. For proper operation, the ranges VSS �
Vin � 18 V and VSS � Vout � VDD are recommended.
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