MC14012BDR2 ,B-Suffix Series CMOS GatesELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ − 55CÎÎ 25CÎÎÎÎÎ 125CÎÎÎV VDDChar ..
MC14012BFEL ,B-Suffix Series CMOS GatesMaximum ratings applied to the device are individual stress limit values (notnormal operating condi ..
MC14012UBCL ,UB-Suffix Series COMS GatesMaximum Ratings are those values beyond which damage to the device may occur.†Temperature Derating: ..
MC14012UBCP ,UB-Suffix Series COMS GatesMAXIMUM RATINGS* (Voltages Referenced to V )SSÎÎÎÎÎÎSymbol Parameter Value UnitÎÎV DC Supply Voltag ..
MC14012UBCP ,UB-Suffix Series COMS GatesMaximum Ratings are those values beyond which damage to the device may occur.†Temperature Derating: ..
MC14013B ,Dual D-Type Flip-Flophttp://onsemi.comAPPLICATION NOTEPrepared by: Alfredo Ochoa, Alex Lara & Gabriel GonzalezThyristors ..
MC6803CP ,1.0MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)0 MOTOROLAM06801M06803SEMI CO N D U CTOR S35-01%;50 $LUESTE1NB§~VDW AUSTIN, TEXAS '73723' .MICROCOM ..
MC6803CP ,1.0MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)0 MOTOROLAM06801M06803SEMI CO N D U CTOR S35-01%;50 $LUESTE1NB§~VDW AUSTIN, TEXAS '73723' .MICROCOM ..
MC6803CP-1 ,1.25MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)BLOCK DIAGRAM.-LUElo‘mm‘ZE 0:T-lt/IW]tnt/IXDU)0U)>>ModeExpanded Multipiexed MPUExpanded Non-Multipl ..
MC6803L ,1.0MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)BLOCK DIAGRAM.-LUElo‘mm‘ZE 0:T-lt/IW]tnt/IXDU)0U)>>ModeExpanded Multipiexed MPUExpanded Non-Multipl ..
MC6803P ,1.0MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)MAXIMUM RATINGSSupply Voltage m —0.3 to +7.0 “Input Voltage m -O.3 to +7.0 nOperating Temperature R ..
MC6803P1 ,1.25MHz; V(cc / in): -0.3 to +7.0V; 8-bit single-chip microcomputer (MCU)0 MOTOROLAM06801M06803SEMI CO N D U CTOR S35-01%;50 $LUESTE1NB§~VDW AUSTIN, TEXAS '73723' .MICROCOM ..
MC14012BDR2-MC14012BFEL
B-Suffix Series CMOS Gates
MC14012B
B-Suffix Series CMOS Gates
The B Series logic gates are constructed with P−Channel and
N−Channel enhancement mode devices in a single monolithic
structure (Complementary MOS). Their primary use is where low
power dissipation and/or high noise immunity is desired.
Features Supply Voltage Range = 3.0 Vdc to 18 Vdc All Outputs Buffered Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range Double Diode Protection on All Inputs Pin−for−Pin Replacements for Corresponding CD4000 Series B
Suffix Devices Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/�C From 65�C To 125�C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS � (Vin or Vout) � VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
*For additional information on our Pb−Free strategy and soldering details, please
