MC10H211M ,Dual 3-Input 3-Output NOR Gate3MC10H211PACKAGE DIMENSIONSPLCC−20FN SUFFIXPLASTIC PLCC PACKAGECASE 775−02ISSUE DM S S0.007 (0.180) ..
MC10H211M ,Dual 3-Input 3-Output NOR GateELECTRICAL CHARACTERISTICS (V = −5.2 V ±5%) (See Note 1)EE0° 25° 75°Symbol Characteristic Min Max M ..
MC10H211MEL ,Dual 3-Input 3-Output NOR Gate
MC10H211MEL ,Dual 3-Input 3-Output NOR Gate
MC10H211P ,Dual 3-Input 3-Output NOR GateMAXIMUM RATINGSCharacteristic Symbol Rating UnitPower Supply (V = 0) V –8.0 to 0 VdcCC EE
MC10H330FN ,Quad MSTR
MC4316L ,Programmable modulo-N counter(13) MOTOROLAPROGRAMMABLE MODULO-N COUNTERSThe monolithic devices are programmable, cascadable,modu ..
MC4324L ,DUAL VOLTAGE-CONTROLLED MULTIVIBRATORM04324M04024(8) MOTOROLADUAL VOLTAGE-CONTROLLED MULTIVIBRATORThe MC4324/4024 consists of two indepe ..
MC4344L ,Phase-frequency detectorLOGIC DIAGRAMPhaseFrequencyDetector#1 . 2AmplifierPhase CD 12FrequencyDetector 9#2 . 6Vcc-- Pin 14G ..
MC44002P ,CHROMA 4 VIDEO PROCESSORELECTRICAL CHARACTERISTICS (V = 5.0 Vdc, I = 70 μA, T = 25°C, unless otherwise noted.)CC 3 ACharac ..
MC44002P ,CHROMA 4 VIDEO PROCESSORfeatures include 4 selectable matrix modes (primarily forNTSC), fast beam current limiting and 16:9 ..
MC44007P ,CHROMA 4 VIDEO PROCESSORMAXIMUM RATINGS (T = 25°C, unless otherwise noted.)A 1 15 26 B-Y InputsRating Pin Symbol Value Unit ..
MC10H211M
Dual 3-Input 3-Output NOR Gate
MC10H211
Dual 3-Input 3-Output NOR
Gate
The MC10H211 is designed to drive up to six transmission lines
simultaneously. The multiple outputs of this device also allow the wire
ORing of several levels of gating for minimization of gate and package
count.
The ability to control three parallel lines with minimum propagation
delay from a single point makes the MC10H211 particularly useful in
clock distribution applications where minimum clock skew is desired. Propagation Delay, 1.0 ns Typical Power Dissipation, 160 mW Typical Improved Noise Margin 150 mV
(Over Operating V oltage and Temperature Range) Voltage Compensated MECL 10K−Compatible Pb−Free Package is Available*
Figure 1. Logic Diagram
Figure 2. Dip Pin AssignmentVCC1
AOUT
AOUT
AOUT
AIN
AIN
AIN
VEE
VCC2
VCC1
BOUT
BOUT
BOUT
BIN
BIN
BIN
VCC1 = PINS 1, 15
VCC2 = PIN 16
VEE = PIN 8109 1365 3
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our Pb−Free strategy and soldering details, please
MARKING
DIAGRAMS = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
CDIP−16
L SUFFIX
CASE 620A
PDIP−16
P SUFFIX
CASE 648
PLCC−20
FN SUFFIX
CASE 775
EIAJ−16
M SUFFIX
CASE 96610H211
ALYW
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
http://
ORDERING INFORMATION
