MC10H188M ,Hex Buffer with EnableELECTRICAL CHARACTERISTICS (V = –5.2 V ±5%) (See Note 1.)EE0° 25° 75°Symbol Characteristic Min Max ..
MC10H188M ,Hex Buffer with Enable2MC10H188PACKAGE DIMENSIONSPLCC–20FN SUFFIXPLASTIC PLCC PACKAGECASE 775–02ISSUE CM S S0.007 (0.180) ..
MC10H188MEL ,Hex Buffer with Enable2AN1672/DSection 1: Translation Between Differently Supplied ECL Drivers and ReceiversTable 3. Tran ..
MC10H188P ,Hex Buffer with EnableMAXIMUM RATINGSCharacteristic Symbol Rating Unit
MC10H189 ,Hex Inverter with EnableAN1672/DThe ECL Translator GuidePECL • LVPECL • NECL • TTL •LVTTL/LVCMOS • CMOS
MC10H189 ,Hex Inverter with Enable2AN1672/DSection 1: Translation Between Differently Supplied ECL Drivers and ReceiversTable 3. Tran ..
MC4044 ,PHASE-FREQUENCY DETECTORLOGIC DIAGRAMPhaseFrequencyDetector#1 . 2AmplifierPhase CD 12FrequencyDetector 9#2 . 6Vcc-- Pin 14G ..
MC4044L ,Phase-frequency detector(8) MOTOROLAPHASE-FREOUENCY DETECTORThe MC4344/4044 consists of two digital phase detectors, acharg ..
MC4044P ,Phase-frequency detectorLOGIC DIAGRAMPhaseFrequencyDetector#1 . 2AmplifierPhase CD 12FrequencyDetector 9#2 . 6Vcc-- Pin 14G ..
MC-405 , SMD LOW/MEDIUM-FREQUENCY CRYSTAL UNIT
MC4316L ,Programmable modulo-N counter(13) MOTOROLAPROGRAMMABLE MODULO-N COUNTERSThe monolithic devices are programmable, cascadable,modu ..
MC4324L ,DUAL VOLTAGE-CONTROLLED MULTIVIBRATORM04324M04024(8) MOTOROLADUAL VOLTAGE-CONTROLLED MULTIVIBRATORThe MC4324/4024 consists of two indepe ..
MC10H188M
Hex Buffer with Enable
---The MC10H188 is a high–speed Hex Buffer with a common Enable
input. When Enable is in the high–state, all outputs are in the
low–state. When Enable is in the low–state, the outputs take the same
state as the inputs.
This MECL 10H part is a functional/pinout duplication of the
standard MECL 10K family part, with 100% improvement in
propagation delay and no increase in power–supply current. Propagation Delay, 1.3 ns Typical Data–to–Output Power Dissipation 180 mW Typ/Pkg (No Load) Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
LOGIC DIAGRAM
DIP
PIN ASSIGNMENTVCC1
AOUT
BOUT
COUT
AIN
BIN
CIN
VEE
VCC2
FOUT
EOUT
DOUT
FIN
EIN
DIN
COMMON
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
TRUTH TABLE 15 14 13 4 3 29
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://
ORDERING INFORMATION
MARKING
DIAGRAMS = Assembly Location = Wafer Lot = Year = Work Week
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
