MC10H174P ,Dual 4:1 Multiplexer2MC10H174PACKAGE DIMENSIONSPLCC–20FN SUFFIXPLASTIC PLCC PACKAGECASE 775–02ISSUE CM S S0.007 (0.180) ..
MC10H175 ,Quint LatchAN1672/DThe ECL Translator GuidePECL • LVPECL • NECL • TTL •LVTTL/LVCMOS • CMOS
MC10H175FN ,Quint LatchMAXIMUM RATINGS CASE 648–08Characteristic Symbol Rating UnitFN SUFFIXPLCCPower Supply (V = 0) V –8. ..
MC10H175FNR2 ,Quint Latch3MC10H175PACKAGE DIMENSIONSPLCC–20FN SUFFIXPLASTIC PLCC PACKAGECASE 775–02ISSUE CM S S0.007 (0.180) ..
MC10H175L ,Quint Latchfeatures five D type latches with common reset and a the positive transition of the clock. While th ..
MC10H175P ,Quint Latchfeatures five D type latches with common reset and a the positive transition of the clock. While th ..
MC3PHAC-VDW ,3-Phase AC Motor Controllerfeatures are:• Volts-per-Hertz speed control Digital signal processing (DSP) filtering to enhance ..
MC4016L ,Programmable modulo-N counterLOGIC DIAGRAMS-tr-e' -onI L r'1-----v--,il'us12VCC = Pin16MC4317/4017Clock 1G am"=<} GND=Pin 85L DO ..
MC4016P ,Programmable modulo-N counter(13) MOTOROLAPROGRAMMABLE MODULO-N COUNTERSThe monolithic devices are programmable, cascadable,modu ..
MC4018P ,Programmable modulo-N counterLOGIC DIAGRAMS-tr-e' -onI L r'1-----v--,il'us12VCC = Pin16MC4317/4017Clock 1G am"=<} GND=Pin 85L DO ..
MC4024 ,DUAL VOLTAGE-CONTROLLED MULTIVIBRATORM04324M04024(8) MOTOROLADUAL VOLTAGE-CONTROLLED MULTIVIBRATORThe MC4324/4024 consists of two indepe ..
MC4024L ,DUAL VOLTAGE-CONTROLLED MULTIVIBRATORM04324M04024(8) MOTOROLADUAL VOLTAGE-CONTROLLED MULTIVIBRATORThe MC4324/4024 consists of two indepe ..
MC10H174P
Dual 4:1 Multiplexer
----The MC10H174 is a Dual 4–to–1 Multiplexer. This device is a
functional/ pinout duplication of the standard MECL 10K part, with
100% improvement in propagation delay and no increase in power
supply current. Propagation Delay, 1.5 ns Typical Power Dissipation, 305 mW Typical Improved Noise Margin 150 mV (over operating voltage and
temperature range) Voltage Compensated MECL 10K–Compatible
DIP PIN ASSIGNMENTVCC1
DO0
DO2
DO1
DO3
VEE
VCC2
ENABLE
D10
D12
D11
D13
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 183546
A 7
ENABLE 14 13 11 12 10
2 Z
15 W
LOGIC DIAGRAM
http://
ORDERING INFORMATION
MARKING
DIAGRAMS = Assembly Location = Wafer Lot = Year = Work Week
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
TRUTH TABLE
