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MC10124FN-MC10124L-MC10124P Fast Delivery,Good Price
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MC10124FNMOTN/a20avaiQuad TTL to MECL Translator
MC10124LMOTON/a85avaiQuad TTL to MECL Translator
MC10124PMOTOROLAN/a4avaiQuad TTL to MECL Translator


MC10124L ,Quad TTL to MECL TranslatorLOGIC DIAGRAMB D3 14OUT OUTDA 4 13OUTOUT54CA 5 12OUTIN62COMMOND6 11INSTROBE73B C7 10IN IN1VV 8 9CCE ..
MC10124P ,Quad TTL to MECL TranslatorLOGIC DIAGRAMB D3 14OUT OUTDA 4 13OUTOUT54CA 5 12OUTIN62COMMOND6 11INSTROBE73B C7 10IN IN1VV 8 9CCE ..
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MC10125 ,Quad MECL to TTL Transistor**SEMICONDUCTOR TECHNICAL DATA* * ** **The MC10125 is a quad translator for interfacing data and c ..
MC10125FN ,Quad MECL to TTL TransistorLOGIC DIAGRAMA 3 14 DIN IN243 A D4 13OUT OUTB C6 5 12OUT OUT57B 6 11 CIN IN1012B C7 10IN IN11V V8 9 ..
MC10125L ,Quad MECL to TTL TransistorLOGIC DIAGRAMA 3 14 DIN IN243 A D4 13OUT OUTB C6 5 12OUT OUT57B 6 11 CIN IN1012B C7 10IN IN11V V8 9 ..
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MC33340P ,Battery Fast Charge ControllerELECTRICAL CHARACTERISTICS (V = 6.0 V, for typical values T = 25°C, for min/max values T is the op ..
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MC33340P ,Battery Fast Charge Controller
MC33341 ,Power Supply Battery Charger Regulation Control Circuit
MC33341 ,Power Supply Battery Charger Regulation Control Circuit


MC10124FN-MC10124L-MC10124P
Quad TTL to MECL Translator
SEMICONDUCTOR TECHNICAL DATA -
The MC10124 is a quad translator for interfacing data and control signals
between a saturated logic section and the MECL section of digital systems. The
MC10124 has TTL compatible inputs, and MECL complementary open–emitter
outputs that allow use as an inverting/ non–inverting translator or as a
differential line driver. When the common strobe input is at the low logic level, it
forces all true outputs to a MECL low logic state and all inverting outputs to a
MECL high logic state.
Power supply requirements are ground, +5.0 Volts, and –5.2 Volts.
Propagation delay of the MC10124 is typically 3.5 ns. The dc levels are
standard or Schottky TTL in, MECL 10,000 out.
An advantage of this device is that TTL level information can be transmitted
differentially, via balanced twisted pair lines, to the MECL equipment, where the
signal can be received by the MC10115 or MC10116 differential line receivers.
The MC10124 is useful in computers, instrumentation, peripheral controllers,
test equipment, and digital communications systems. = 380 mW typ/pkg (No Load)
tpd = 3.5 ns typ (+ 1.5 Vdc in to 50% out)
tr, tf = 2.5 ns typ (20%–80%)
LOGIC DIAGRAM

Gnd = PIN 16
VCC (+5.0Vdc)= PIN 9
VEE (–5.2Vdc)= PIN 8 13 12 3 4
DIP
PIN ASSIGNMENT

BOUT
AOUT
BOUT
AOUT
AIN
COMMON
STROBE
BIN
VEE
GND
COUT
DOUT
DOUT
COUT
DIN
CIN
VCC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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