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Partno	Mfg	Dc	Qty	Available	Descript
MC10117	MOTO	N/a	219	avai	Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate

MC10117 ,Dual 2-Wide 2-3-Input OR-AND/OR-AND GateELECTRICAL CHARACTERISTICSTest LimitsPin Pi–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC10117L ,Dual 2-Wide 2-3-Input OR-AND/OR-AND GateLOGIC DIAGRAM4DIP5PIN ASSIGNMENT326V V1 167 CC1 CC2A B2 15OUT OUT9BA 3 14OUTOUT10A1 B14 13IN IN1114 ..
MC10117P ,Dual 2-Wide 2-3-Input OR-AND/OR-AND GateELECTRICAL CHARACTERISTICSTest LimitsPin Pi–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC10121 ,4-Wide OR-AND/OR-AND GateELECTRICAL CHARACTERISTICSTest LimitsPi Pin–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC10121L ,4-Wide OR-AND/OR-AND GateLOGIC DIAGRAMCASE 775–02456 DIPPIN ASSIGNMENT79V V1 16CC1 CC22103A4A 2 15INOUT11 A A43 14OUT IN12A1 ..
MC10121P ,4-Wide OR-AND/OR-AND GateLOGIC DIAGRAMCASE 775–02456 DIPPIN ASSIGNMENT79V V1 16CC1 CC22103A4A 2 15INOUT11 A A43 14OUT IN12A1 ..
MC33275ST-2.5T3 ,300mA, Low Dropout Voltage RegulatorELECTRICAL CHARACTERISTICS (C = 1.0 F, T = 25°C, for min/max values T = −40°C to +125°C, Note 1)L ..
MC33275ST-3.0T3 ,300mA, Low Dropout Voltage Regulator3OUTPUT VOLTAGE CHANGE (mV)OUTPUT VOLTAGE CHANGE (V)OUTPUT VOLTAGE CHANGE (mV)OUTPUT VOLTAGE CHANGE ..
MC33275ST-3.3T3 ,300mA, Low Dropout Voltage RegulatorFeatures:1• Low Quiescent Current (125 A)312 3GND• Low Input−to−Output Voltage Differential of 25 ..
MC33282 ,Amplifiers and Comparators
MC33282 ,Amplifiers and Comparators
MC33282D ,Low Input Offset, High Slew Rate, Wide Bandwidth, JFET Input Op AmpELECTRICAL CHARACTERISTICS (V = +15 V, V = –15 V, T = 25°C, unless otherwise noted.)CC EE ACharacte ..

MC10117
Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate
SEMICONDUCTOR TECHNICAL DATA - -
The MC10117 is a dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate.
This general purpose logic element is designed for use in data control, such as
digital multiplexing or data distribution. Pin 9 is common to both gates. = 100 mW typ/pkg (No Load)
tpd = 2.3 ns typ
tr, tf = 2.2 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
A1IN
A1IN
A2IN
A2IN
VEE
VCC2
BOUT
BOUT
B1IN
B1IN
B2IN
B2IN
A2IN, B2IN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).

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