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MC10109FNMOTN/a1978avaiDual 4-5-Input OR/NOR Gate
MC10109LMOTON/a75avaiDual 4-5-Input OR/NOR Gate
MC10109PMOTON/a266avaiDual 4-5-Input OR/NOR Gate


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MC10109FN-MC10109L-MC10109P
Dual 4-5-Input OR/NOR Gate
SEMICONDUCTOR TECHNICAL DATA -
The MC10109 is a dual 4–5 input OR/NOR gate. = 30 mW typ/gate (No Load)
tpd = 2.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM

VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8 3 14
DIP
PIN ASSIGNMENT

VCC1
AOUT
AOUT
AIN
AIN
AIN
AIN
VEE
VCC2
BOUT
BOUT
BIN
BIN
BIN
BIN
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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