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Partno	Mfg	Dc	Qty	Available	Descript
MC10106L		N/a	542	avai	Triple 4-3-3-Input NOR Gate
MC10106P	MOTO	N/a	245	avai	Triple 4-3-3-Input NOR Gate

MC10106L ,Triple 4-3-3-Input NOR GateLOGIC DIAGRAMPLASTIC PACKAGECASE 648–084FN SUFFIX53 PLCC6CASE 775–027910 2DIP11PIN ASSIGNMENT121315 ..
MC10106P ,Triple 4-3-3-Input NOR GateLOGIC DIAGRAMPLASTIC PACKAGECASE 648–084FN SUFFIX53 PLCC6CASE 775–027910 2DIP11PIN ASSIGNMENT121315 ..
MC10107 ,Triple 2-Input Exclusive OR/Exclusive NOR GateLOGIC DIAGRAMFN SUFFIX4 2 PLCCCASE 775–025 39 117 10DIP14 12PIN ASSIGNMENT15 13V 1 16 VCC1 CC23 = ( ..
MC10107FN ,Triple 2-Input Exclusive OR/Exclusive NOR GateLOGIC DIAGRAMFN SUFFIX4 2 PLCCCASE 775–025 39 117 10DIP14 12PIN ASSIGNMENT15 13V 1 16 VCC1 CC23 = ( ..
MC10107L ,Triple 2-Input Exclusive OR/Exclusive NOR GateLOGIC DIAGRAMFN SUFFIX4 2 PLCCCASE 775–025 39 117 10DIP14 12PIN ASSIGNMENT15 13V 1 16 VCC1 CC23 = ( ..
MC10107P ,Triple 2-Input Exclusive OR/Exclusive NOR GateLOGIC DIAGRAMFN SUFFIX4 2 PLCCCASE 775–025 39 117 10DIP14 12PIN ASSIGNMENT15 13V 1 16 VCC1 CC23 = ( ..
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MC10106L-MC10106P
Triple 4-3-3-Input NOR Gate
SEMICONDUCTOR TECHNICAL DATA -
The MC10106 is a triple 4–3–3 input NOR gate. = 30 mW typ/gate (No Load)
tpd = 2.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8 15 2 36
DIP
PIN ASSIGNMENT
VCC1
BOUT
AOUT
AIN
AIN
AIN
AIN
VEE
VCC2
COUT
CIN
CIN
CIN
BIN
BIN
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).

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