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MC10105MOTN/a71avaiTriple 2-3-2-Input OR/NOR Gate


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MC10105
Triple 2-3-2-Input OR/NOR Gate
SEMICONDUCTOR TECHNICAL DATA -
The MC10105 is a triple 2–3–2 input OR/NOR gate. = 30 mW typ/gate (No Load)
tpd = 2.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM

VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8 15 14 2 7 610
DIP
PIN ASSIGNMENT

VCC1
AOUT
AOUT
AIN
AIN
BOUT
BOUT
VEE
VCC2
COUT
COUT
CIN
CIN
BIN
BIN
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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