MC100EL56D ,5V ECL Dual Differential 2:1 Multiplexer2COM_SELMC100EL56100EL SERIES PECL DC CHARACTERISTICS V = 5.0 V; V = 0.0 V (Note 2)CC EE–40°C 25°C ..
MC100EL56DW ,5V ECL Dual Differential 2:1 Multiplexer3AN1672/DSection 2: Translation from Different ECL Operating Mode Drivers to Non ECL ReceiversThe f ..
MC100EL56DWR2 ,5V ECL Dual Differential 2:1 Multiplexer
MC100EL56DWR2 ,5V ECL Dual Differential 2:1 Multiplexer2AN1672/DSection 1: Translation Between Differently Supplied ECL Drivers and ReceiversTable 3. Tran ..
MC100EL57 ,5V ECL 4:1 Differential Multiplexer2AN1406/Dreduced while maintaining acceptable manufacturing design. After all the inclusion of ECL ..
MC100EL57D ,5V ECL 4:1 Differential Multiplexer3Differential ECLAN1406/DThe traditional choice of a negative power supply for ECL for both the 10H ..
MC33064 ,UnderVoltage Sensing CircuitMaximum ratings applied to the device are individual stress limitvalues (not normal operating condi ..
MC33064D-5 ,UNDERVOLTAGE SENSING CIRCUITThermal CharacteristicsP Suffix, Plastic PackageMaximum Power Dissipation @ T = 25°C P 625 mWA DThe ..
MC33064D-5R2 ,UnderVoltage Sensing CircuitThermal CharacteristicsP Suffix, Plastic PackageP 625 mWMaximum Power Dissipation @ T = 25°C DAR 20 ..
MC33064D-5R2G , UNDERVOLTAGE SENSING CIRCUIT
MC33064P-005 ,UNDERVOLTAGE SENSING CIRCUITThermal CharacteristicsP Suffix, Plastic PackageMaximum Power Dissipation @ T = 25°C P 625 mWA DThe ..
MC33064P-5 ,UNDERVOLTAGE SENSING CIRCUITThermal CharacteristicsP Suffix, Plastic PackageMaximum Power Dissipation @ T = 25°C P 625 mWA DThe ..
MC100EL56D
5V ECL Dual Differential 2:1 Multiplexer
MC100EL56
5V�ECL Dual Differential
2:1 Multiplexer
The MC100EL56 is a dual, fully differential 2:1 multiplexer. The
differential data path makes the device ideal for multiplexing low
skew clock or other skew sensitive signals. Multiple VBB pins are
provided to ease AC coupling input signals.
The VBB pins, an internally generated voltage supply, are available
to this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 �F capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The device features both individual and common select inputs to
address both data path and random logic applications.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open, the D input will pull down to VEE. The D input will bias
around VCC/2 forcing the Q output LOW. 440 ps Typical Propagation Delays Separate and Common Select ESD Protection: > 2 KV HBM, > 100 V MM The 100 Series Contains Temperature Compensation PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V NECL Mode Operating Range: VCC = 0 V
with VEE = –4.2 V to –5.7 V Internal Input Pulldown Resistors on D(s), SEL(s), and COM_SEL Q Output will Default LOW with Inputs Open or at VEE Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 code V–0 @ 1/8″,
Oxygen Index 28 to 34 Transistor Count = 147 devices
http://
MARKING
DIAGRAM = Assembly Location = Wafer Lot = Year = Work Week
SO–20
DW SUFFIX
CASE 751D
ORDERING INFORMATION
