IC Phoenix
 
Home ›  MM95 > MC100E143FN,5V ECL 9-Bit Hold Register
MC100E143FN Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
MC100E143FNONN/a118avai5V ECL 9-Bit Hold Register


MC100E143FN ,5V ECL 9-Bit Hold RegisterMaximum Ratings are those values beyond which device damage may occur.10E SERIES PECL DC CHARACTERI ..
MC100E150FN ,6-BIT D LATCHAN1672/DThe ECL Translator GuidePECL • LVPECL • NECL • TTL •LVTTL/LVCMOS • CMOS
MC100E150FNR2 ,5V ECL 6-Bit D LatchAPPLICATION NOTEThis application note examines the concept of of each data trace is the correspondi ..
MC100E151FN ,5V ECL 6-Bit D RegisterAN1504/DMetastability and theECLinPS FamilyPrepared by: Applications Engineering
MC100E151FNR2 ,5V ECL 6-Bit D Register3AN1672/DSection 2: Translation from Different ECL Operating Mode Drivers to Non ECL ReceiversThe f ..
MC100E151FNR2 ,5V ECL 6-Bit D Register
MC33023DW ,High Speed Single-Ended PWM ControllerThermal CharacteristicsSO–16L Package (Case 751G)Maximum Power Dissipation @ T = +25°C P 862 mWA DT ..
MC33023DWR2 ,HI-SPD PWM Controllerfeatures consisting of input andP SUFFIXAWLYYWWCASE 648reference undervoltage lockouts each with hy ..
MC33025DW ,High Speed Double-Ended PWM ControllerOrder this document by MC34025/D ** *The MC34025 series are high speed, fixed frequency, double–e ..
MC33025P ,HI-SPD PWM ControllerELECTRICAL CHARACTERISTICS (V = 15 V, R = 3.65 kΩ, C = 1.0 nF, for typical values T = +25°C, for m ..
MC33025P ,HI-SPD PWM Controllerfeatures consisting of input and referenceundervoltage lockouts each with hysteresis, cycle–by–cycl ..
MC33025P ,HI-SPD PWM ControllerMAXIMUM RATINGSRating Symbol Value UnitPower Supply Voltage V 30 VCCOutput Driver Supply Voltage V ..


MC100E143FN
5V ECL 9-Bit Hold Register
MC10E143, MC100E143
5V�ECL 9›Bit Hold Register
The MC10E/100E143 is a 9-bit holding register, designed with
byte-parity applications in mind. The E143 holds current data or loads
new data, with the nine inputs D0− D8 accepting parallel input data.
The SEL (Select) input pin is used to switch between the two modes
of operation − HOLD and LOAD. Input data is accepted by the
registers a set-up time before the positive going edge of CLK1 or
CLK2. A HIGH on the Master Reset pin (MR) asynchronously resets
all the registers to zero.
The 100 Series contains temperature compensation. 700 MHz Min. Operating Frequency 9-Bit for Byte-Parity Applications Asynchronous Master Reset Dual Clocks PECL Mode Operating Range: VCC= 4.2 V to 5.7 V
with VEE= 0 V NECL Mode Operating Range: VCC= 0 V
with VEE = −4.2 V to −5.7 V Internal Input 50 K� Pulldown Resistors ESD Protection: Human Body Model; > 2 KV,
Machine Body Model; > 200 V Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34 Transistor Count = 484 devices
ORDERING INFORMATION
MARKING
DIAGRAMS
= Assembly Location = Wafer Lot = Year = Work Week
PLCC−28
FN SUFFIX
CASE 776

http://
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED