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MAX9375EUAMAXN/a2avaiSingle LVDS/Anything-to-LVPECL Translator
MAX9375EUA+TMAXIMN/a2avaiSingle LVDS/Anything-to-LVPECL Translator


MAX9375EUA ,Single LVDS/Anything-to-LVPECL TranslatorApplications Ordering InformationBackplane Logic Standard TranslationPART TEMP RANGE PIN-PACKAGELAN ..
MAX9375EUA+T ,Single LVDS/Anything-to-LVPECL TranslatorELECTRICAL CHARACTERISTICS(V = +3.0V to +3.6V, differential input voltage |V | = 0.1V to 3.0V, inpu ..
MAX9376EUB ,LVDS/Anything-to-LVPECL/LVDS Dual TranslatorELECTRICAL CHARACTERISTICS(V = +3.0V to +3.6V, differential input voltage |V | = 0.1V to 3.0V, inpu ..
MAX9376EUB+ ,LVDS/Anything-to-LVPECL/LVDS Dual TranslatorElectrical Characteristics(V = +3.0V to +3.6V, differential input voltage |V | = 0.1V to 3.0V, inpu ..
MAX9380ESA ,Single-Ended-to-Differential LVECL/LVPECL 2:1 MultiplexerELECTRICAL CHARACTERISTICS(V - V = +3.0V to +3.8V, outputs terminated with 50Ω to V - 2.0V, unless ..
MAX9380EUA ,Single-Ended-to-Differential LVECL/LVPECL 2:1 Multiplexerapplications. The input is selected by a single select Output Low with Open Inputsinput. The selec ..
MB8868A ,MOS Universal Asynchronous Receiver / Transmitter (UART)Features I Full or Hall Duplex Operation I Completely Programmable I Start Bit Generated ..
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MAX9375EUA-MAX9375EUA+T
Single LVDS/Anything-to-LVPECL Translator
General Description
The MAX9375 is a fully differential, high-speed, any-
thing-to-LVPECL translator designed for signal rates up
to 2GHz. The MAX9375’s extremely low propagation
delay and high speed make it ideal for various high-
speed network routing and backplane applications.
The MAX9375 accepts any differential input signal within
the supply rails and with minimum amplitude of 100mV.
Inputs are fully compatible with the LVDS, LVPECL,
HSTL, and CML differential signaling standards. Outputs
are LVPECL and have sufficient current to drive 50Ω
transmission lines.
The MAX9375 is available in an 8-pin µMAX package
and operates from a single +3.3V supply over the -40°C
to +85°C temperature range.
Applications

Backplane Logic Standard Translation
LAN
WAN
DSLAM
DLC
Features
Guaranteed 2GHz Switching FrequencyAccepts LVDS/LVPECL/Anything Inputs421ps (typ) Propagation Delays30ps (max) Pulse Skew2psRMS(max) Random JitterMinimum 100mV Differential Input to Guarantee
AC Specifications
Temperature-Compensated LVPECL Output +3.0V to +3.6V Power-Supply Operating Range>2kV ESD Protection (Human Body Model)
MAX9375
Single LVDS/Anything-to-LVPECL Translator

VCC
OUT
OUT
GNDGND
VCC
MAX9375
μMAX
TOP VIEW
Pin Configuration
Ordering Information

19-2808; Rev 0; 4/03
PARTTEMP RANGEPIN-PACKAGE

MAX9375EUA-40°C to +85°C8 µMAX
LVDS/ANY
SINGLE TRANSLATOR
LVPECL
Functional Diagram
MAX9375
Single LVDS/Anything-to-LVPECL Translator
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.1V
Inputs (IN, IN).............................................-0.3V to (VCC+ 0.3V)
IN to IN................................................................................±3.0V
Continuous Output Current.................................................50mA
Surge Output Current .......................................................100mA
Continuous Power Dissipation (TA= +70°C)
8-Pin µMAX (derate 5.9mW/°C above +70°C)..........470.6mW
θJAin Still Air............................................................+170°C/W
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection
Human Body Model (IN, IN, OUT, OUT).........................≥2kV
Soldering Temperature (10s)...........................................+300°C
DC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 3.0V, input voltage (VIN, VIN) = 0 to VCC, input common-mode voltage
VCM= 0.05V to (VCC- 0.05V), LVPECL outputs terminated with 50Ω±1% to VCC- 2.0V, TA= -40°C to +85°C. Typical values are at
VCC= +3.3V, |VID| = 0.2V, input common-mode voltage VCM= 1.2V, TA= +25°C, unless otherwise noted.) (Notes 1, 2, 3)
-40°C+25°C+85°CPARAMETERSYMBOLCONDITIONSMINTYPMAXMINTYPMAXMINTYPMAXUNITS
DIFFERENTIAL INPUTS (IN, IN)

Differential Input
ThresholdVTHD-100+100-100+100-100+100mV
Input CurrentIIN, I INVIN, V IN = VCC or 0V-20+20-20+20-20+20µA
Input Common-
Mode VoltageVCMFigure 10.05VCC -
0.050.05VCC -
0.050.05VCC -
0.05V
LVPECL OUTPUTS (OUT, OUT)

Single-Ended
Output High
Voltage
VOHVCC -
VCC -
VCC -
VCC -
VCC -
VCC -
VCC -
VCC -
VCC -
0.880V
Single-Ended
Output Low
Voltage
VOLVCC -
VCC -
VCC -
VCC -
VCC -
VCC -
VCC -
VCC -
VCC -
1.620V
Differential Output
VoltageV OH - V OL595725595725595725mV
POWER SUPPLY

Supply CurrentICCAll pins open exceptCC, G N D 101812181418mA
MAX9375
Single LVDS/Anything-to-LVPECL Translator
AC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 1.2V, input frequency ≤1.34GHz, differential input transition time =
125ps (20% to 80%), input voltage (VIN, VIN) = 0 to VCC, input common-mode voltage VCM= 0.05V to (VCC- 0.05V), outputs termi-
nated with 50Ω±1% to VCC- 2.0V, TA= -40°C to +85°C. Typical values are at VCC= +3.3V, |VID| = 0.2V, input common-mode volt-
age VCM= 1.2V, TA= +25°C, unless otherwise noted.) (Note 4)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Switching FrequencyfMAXVOH - VOL ≥ 250mV2.02.5GHz
Propagation Delay Low to HightPLHFigure 2250421600ps
Propagation Delay High to LowtPHLFigure 2250421600ps
Pulse Skew |tPLH -tPHL|tSKEWFigure 2 (Note 5)630ps
Output Low-to-High Transition
Time (20% to 80%)tRFigure 2116220ps
Output High-to-Low Transition
Time (20% to 80%)tFFigure 2116220ps
Added Random JittertRJfIN = 1.34GHz (Note 6)0.72ps(RMS)
Note 1:
Measurements are made with the device in thermal equilibrium. All voltages are referenced to ground except VTHDand VID.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:
DC parameters production tested at TA= +25°C and guaranteed by design and characterization over the full operating
temperature range.
Note 4:
Guaranteed by design and characterization, not production tested. Limits are set at ±6 sigma.
Note 5:
tSKEWis the magnitude difference of differential propagation delays for the same output under the same conditions; tSKEW=
|tPHL- tPLH|.
Note 6:
Device jitter added to the input signal.
Typical Operating Characteristics

(VCC= +3.3V, differential input voltage |VID| = 0.2V, VCM= 1.2V, input frequency = 500MHz, outputs terminated with 50Ω±1% to
VCC- 2.0V, TA= +25°C, unless otherwise noted.)100050015002000
NO LOAD
SUPPLY CURRENT vs. FREQUENCY

MAX9375 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
OUTPUT AMPLITUDE vs. FREQUENCY
MAX9375 toc02
FREQUENCY (MHz)
OUTPUT AMPLITUDE (mV)
MAX9375
Single LVDS/Anything-to-LVPECL Translator

OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9375 toc04
TEMPERATURE (°C)
OUTPUT RISE/FALL TIME (ps)
Typical Operating Characteristics (continued)

(VCC= +3.3V, differential input voltage |VID| = 0.2V, VCM= 1.2V, input frequency = 500MHz, outputs terminated with 50Ω±1% to
VCC- 2.0V, TA= +25°C, unless otherwise noted.)
Detailed Description

The MAX9375 is a fully differential, high-speed, any-
thing-to-LVPECL translator designed for signal rates up
to 2GHz. The MAX9375’s extremely low propagation
delay and high speed make it ideal for various high-
speed network routing and backplane applications.
The MAX9375 accepts any differential input signals
within the supply rails and with a minimum amplitude of
100mV. Inputs are fully compatible with the LVDS,
LVPECL, HSTL, and CML differential signaling stan-
dards. Outputs are LVPECL and have sufficient current
to drive 50Ωtransmission lines.
Inputs

Inputs have a wide common-mode range of 0.05V to
(VCC- 0.05V), which accommodates any differential
signals within rails, and requires a minimum of 100mV
to switch the outputs. This allows the MAX9375 inputs
to support virtually any differential signaling standard.
LVPECL Outputs

The MAX9375 outputs are emitter followers that require
external resistive paths to a voltage source (VT= VCC
- 2.0V typ) more negative than worst-case VOLfor proper
static and dynamic operation. When properly terminat-
ed, the outputs generate steady-state voltage levels,
VOLor VOHwith fast transition edges between state
levels. Output current always flows into the termination
during proper operation.
Pin Description
PINNAMEFUNCTION

1, 8VCC
Positive Supply. Bypass from VCC to
GND with 0.1µF and 0.01µF ceramic
capacitors. Place the capacitors as
close to the device as possible with the
smaller value capacitor closest to the
device.INLVDS/Anything Noninverting InputINLVDS/Anything Inverting Input
4, 5GNDPower Supply Ground ConnectionOUTDifferential LVPECL Inverting Output.
Terminate with 50Ω ±1% to VCC - 2V.OUTDifferential LVPECL Noninverting Output.
Terminate with 50Ω ±1% to VCC - 2V.
PROPAGATION DELAY
vs. TEMPERATURE
MAX9375 toc03
TEMPERATURE (°C)
PROPAGATION DELAY (ps)
tPLH
tPHL
Applications Information
Output Termination

Terminate the outputs with 50Ωto (VCC- 2V) or use
equivalent Thevenin terminations. Terminate OUT and
OUTwith identical termination on each for low-output
distortion. When a single-ended signal is taken from the
differential output, terminate both OUT and OUT. Ensure
that output currents do not exceed the current limits as
specified in the Absolute Maximum Ratings. Under all
operating conditions, the device’s total thermal limits
should be observed.
Supply Bypassing

Bypass VCCto ground with high-frequency surface-
mount ceramic 0.1µF and 0.01µF capacitors. Place the
capacitors as close to the device as possible with the
0.01µF capacitor closest to the device pins.
Traces

Circuit board trace layout is very important to maintain
the signal integrity of high-speed differential signals.
Maintaining integrity is accomplished in part by reduc-
ing signal reflections and skew, and increasing com-
mon-mode noise immunity.
Signal reflections are caused by discontinuities in the
50Ωcharacteristic impedance of the traces. Avoid dis-
continuities by maintaining the distance between differ-
ential traces, not using sharp corners or using vias.
Maintaining distance between the traces also increases
common-mode noise immunity. Reducing signal skew
is accomplished by matching the electrical length of
the differential traces.
MAX9375
Single LVDS/Anything-to-LVPECL Translator

VCM (MAX) = VCC - 0.05V
VCC
GND
VID
VCM (MIN) = 0.05VVID
Figure 1. Input Definitions
Chip Information

TRANSISTOR COUNT: 614
PROCESS: Bipolar
80%
OUT - OUT
20%20%
80%
0V DIFFERENTIALtR
VID0V DIFFERENTIAL
tPLHtPHLVOH
VOL
VOH - VOL
VOH - VOL
VOH - VOL
DIFFERENTIAL OUTPUT
WAVEFORM
OUT
OUT
Figure 2. Differential Input-to-Output Propagation Delay Timing
Diagram
MAX9375
Single LVDS/Anything-to-LVPECL Translator

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to /packages.)
8LUMAXD.EPS
PACKAGE OUTLINE, 8L uMAX/uSOP21-0036J
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
MAX
0.0207 BSC
0.0256 BSCA1b
FRONT VIEWSIDE VIEWH
0.6±0.1
0.6±0.10.50±0.1
TOP VIEW0.030
BOTTOM VIEW6∞
0.0054X S
INCHES
MIN
0.5250 BSC
0.65 BSC
0.660∞
MAXMIN
MILLIMETERS1.10
DIM
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