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MAX9371ESAMAXIN/a285avaiLVTTL/TTL-to-Differential LVPECL/PECL Translators
MAX9372ESAMAXIMN/a2372avaiLVTTL/TTL-to-Differential LVPECL/PECL Translators


MAX9372ESA ,LVTTL/TTL-to-Differential LVPECL/PECL TranslatorsELECTRICAL CHARACTERISTICS(V = 3.0V to 5.25V for MAX9370/MAX9371, V = 3.0V to 3.6V for MAX9372, out ..
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MAX9376EUB ,LVDS/Anything-to-LVPECL/LVDS Dual TranslatorELECTRICAL CHARACTERISTICS(V = +3.0V to +3.6V, differential input voltage |V | = 0.1V to 3.0V, inpu ..
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MAX9371ESA-MAX9372ESA
LVTTL/TTL-to-Differential LVPECL/PECL Translators
General Description
The MAX9370/MAX9371/MAX9372 LVTTL/TTL-to-differ-
ential LVPECL/PECL translators are designed for high-
speed communication signal and clock driver
applications. The MAX9370/MAX9372 are dual
LVTTL/TTL-to-LVPECL/PECL translators that operate in
excess of 1GHz. The MAX9371 is a single translator.
The MAX9370/MAX9371 operate over a wide 3.0V to
5.25V supply range, allowing high-performance clock
or data distribution in systems with a nominal 3.3V or
5.0V supply. The MAX9372 is designed to operate from
3.0V to 3.6V.
The devices default to output high if the input is discon-
nected. They feature low 270ps propagation delay. The
MAX9370/MAX9371/MAX9372 employ industry-stan-
dard flow-through pinouts. These devices are specified
for operation from -40°C to +85°C, and are offered in
space-saving, 8-pin SOT23, µMAX, and SO packages.
Applications

Precision Clock/Data Level Translation
Central Office Clock Distribution
DSLAM/DLC
Base Station
Mass Storage
Features
Guaranteed 1GHz Operating Frequency at 600mV
Differential Output
270ps Propagation Delay10ps Output-to-Output Skew (MAX9370/MAX9372)Wide Supply Range: 3.0V to 5.25V
(MAX9370/MAX9371)
ESD Protection > 2kV (Human Body Model)Output High with Input OpenAvailable in Small 8-Pin SOT23, µMAX, and SO
Packages
Improved Upgrades to MC100EL22, MC100EPT20,
MC100EPT22
MAX9370/MAX9371/MAX9372VTTL/TTL-to-Differential LVPECL/PECLranslators
Ordering Information
Typical Operating Circuit

19-2377; Rev 0; 4/02
*Future product—contact factory for availability.Pin Configurations/Functional Diagrams appears at end of
data sheet.
MAX9370/MAX9371/MAX9372
LVTTL/TTL-to-Differential LVPECL/PECL
Translators
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND (MAX9370/MAX9371).......................-0.3V to +5.5V
VCCto GND (MAX9372)........................................-0.3V to +4.0V
D_ to GND..................................................-0.3V to (VCC+ 0.3V)
Q_, Q_to GND...........................................-0.3V to (VCC+ 0.3V)
Continuous Output Current ................................................50mA
Surge Output Current........................................................100mA
Junction-to-Ambient Thermal Resistance in Still Air
8-Pin SOT23..............................................................+112°C/W
8-Pin µMAX…............................................................+221°C/W
8-Pin SO....................................................................+170°C/W
Junction-to-Ambient Thermal Resistance with
500LFPM Airflow
8-Pin SOT23................................................................+78°C/W
8-Pin µMAX…............................................................+155°C/W
8-Pin SO......................................................................+99°C/W
Junction-to-Case Thermal Resistance
8-Pin SOT23................................................................+80°C/W
8-Pin µMAX…..............................................................+39°C/W
8-Pin SO......................................................................+40°C/W
Continuous Power Dissipation (TA= +70°C)
8-Pin SO (derate 5.9mW/°C above +70°C)...................470mW
8-Pin µMAX (derate 4.5mW/°C above +70°C)..............362mW
8-Pin SOT23 (derate 8.9mW/°C above +70°C).............714mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Soldering Temperature (10s)...........................................+300°C
DC ELECTRICAL CHARACTERISTICS

(VCC= 3.0V to 5.25V for MAX9370/MAX9371, VCC= 3.0V to 3.6V for MAX9372, outputs terminated with 50Ω±1% to VCC- 2.0V.
Typical values are at VCC= 3.3V, VIH = 2.4V, VIL= 0.4V, unless otherwise noted.) (Notes 1, 2, 3)
MAX9370/MAX9371/MAX9372VTTL/TTL-to-Differential LVPECL/PECLranslators
DC ELECTRICAL CHARACTERISTICS (continued)

(VCC= 3.0V to 5.25V for MAX9370/MAX9371, VCC= 3.0V to 3.6V for MAX9372, outputs terminated with 50Ω±1% to VCC- 2.0V.
Typical values are at VCC= 3.3V, VIH = 2.4V, VIL= 0.4V, unless otherwise noted.) (Notes 1, 2, 3)
AC ELECTRICAL CHARACTERISTICS

(VCC= 3.0V to 5.25V for MAX9370/MAX9371, VCC= 3.0V to 3.6V for MAX9372, outputs terminated with 50Ω±1% to VCC- 2.0V, input
frequency ≤1.0GHz, input transition time = 125ps (20% to 80%), VIH= 2.0V, VIL= 0.8V. Typical values are at VCC= 3.3V, VIH=
2.4V, VIL= 0.4V, unless otherwise noted.) (Note 5)
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:
DC parameters are production tested at TA= +25°C. DC limits are guaranteed by design and characterization over the full
operating temperature range.
Note 4:
All pins are open except VCCand GND.
Note 5:
Guaranteed by design and characterization. Limits are set to ±6 sigma.
Note 6:
Measured between outputs of the same part at the signal crossing points under identical conditions for a same-edge transition.
Note 7:
Device jitter added to the input signal.
MAX9370/MAX9371/MAX9372
LVTTL/TTL-to-Differential LVPECL/PECL
Translators
Typical Operating Characteristics

(MAX9371, VCC= 3.3V, VIH= 2.4V, VIL= 0.4V, outputs terminated with 50Ωto VCC- 2V, input transition time = 125ps (20% to 80%),= +25°C, unless otherwise noted.)
Detailed Description
The MAX9370/MAX9371/MAX9372 LVTTL/TTL-to-differ-
ential LVPECL/PECL translators are designed for high-
speed communication signal and clock driver
applications. The MAX9370/MAX9372 are dual LVTTL-
to-LVPECL/PECL translators that operate in excess of
1GHz. The MAX9371 is a single translator. The
MAX9370/MAX9371 operate over a wide 3.0V to 5.25V
supply range, allowing high-performance clock or data
distribution in systems with a nominal 3.3V or 5.0V sup-
ply. The MAX9372 is optimized for 3.0V to 3.6V opera-
tion. These devices feature low 270ps propagation
delay and 40ps peak-to-peak deterministic jitter.
Inputs and Outputs

The MAX9370/MAX9371/MAX9372 inputs accept stan-
dard LVTTL/TTL levels. The input has pullup circuitry that
drives the outputs to a differential high if the inputs are
open. The outputs are differential LVPECL/PECL levels.
Applications Information
Output Termination

Terminate outputs with 50Ωto VCC- 2V or use an equiv-
alent Thevenin termination. Use the same terminate on
each output for the lowest output-to-output skew. When a
single-ended signal is taken from a differential output,
terminate both outputs. For example, if Q is used as a
single-ended output, terminate both Q and Q.
MAX9370/MAX9371/MAX9372VTTL/TTL-to-Differential LVPECL/PECLranslators
MAX9370/MAX9371/MAX9372
Ensure that the output currents do not exceed the con-
tinuous safe output current limit or surge output current
limit as specified in the Absolute Maximum Ratings
table. Under all operating conditions, the device’s total
thermal limits should be observed.
Supply Bypassing

Bypass VCCto GND with high-frequency surface-mount
ceramic 0.1µF and 0.01µF capacitors in parallel and as
close to the device as possible, with the 0.01µF capaci-
tor closest to the device. Use multiple parallel vias to
minimize parasitic inductance.
PC Board Traces

Input and output trace characteristics affect the perfor-
mance of the MAX9370/MAX9371/MAX9372. Connect
each differential output to a 50Ωcharacteristic impedance
trace. Minimize the number of vias to prevent impedance
discontinuities. Reduce reflections by maintaining the 50Ω
characteristic impedance through connectors and across
cables. Reduce skew within a differential pair by match-
ing the electrical length of the traces.
Chip Information

TRANSISTOR COUNT: 358
PROCESS: Bipolar
LVTTL/TTL-to-Differential LVPECL/PECL
Translators

Figure 1. Input-to-Output Propagation Delay and Transition Timing Diagram
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