MAX9225ETE Fast Delivery |IC PHOENIX CO.,LIMITED

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MAX9225ETE
10-Bit, Low-Power, 10MHz-to-20MHz Serializer and Deserializer Chipset
General Description
The MAX9225/MAX9226 serializer/deserializer chipset
reduces wiring by serializing 10 bits onto a single differ-
ential pair. Ten bits are serialized in each cycle of the
parallel input clock resulting in a 100Mbps to 200Mbps
net serial-data rate. The MAX9225 serializes the 8-bit
YUV, HSYNC and VSYNC outputs from a camera mount-
ed in the flip part of the phone, reducing wiring through
the hinge to the baseband processor in the base of the
phone. The 2-wire serial interface uses low-current differ-
ential signaling (LCDS) for low EMI, high common-mode
noise immunity, and ground-shift tolerance. The
MAX9225/MAX9226 automatically identify the word
boundary in the serial data in case of signal interruption.
The MAX9226 power-down is controlled by the
MAX9225. The MAX9225/MAX9226 consume 3.5µA or
less in power-down mode.
The MAX9225 serializer operates from a single +2.375V
to +3.465V supply and accepts +1.71V to +3.465V
inputs. The MAX9226 deserializer operates from a
+2.375V to +3.465V core supply and has a separate
output buffer supply (VDDO), allowing +1.71V to
+3.465V output high levels.
The MAX9225/MAX9226 are specified over the -40°C to
+85°C extended temperature range and are available
in 16-pin TQFN (3mm x 3mm x 0.8mm) packages with
an exposed paddle.
Applications
Cell Phone Cameras
Digital Cameras
FeaturesIdeal for Serializing Cell Phone Camera Parallel
InterfaceMAX9225 Serializes 8-Bit YUV, HSYNC, and VSYNCLCDS Rejects Common-Mode NoiseAutomatic Location of Word Boundary After
Signal InterruptionPower-Down Control Through the Serial LinkPower-Down Supply Current
0.5µA (max) for MAX9225
3.0µA (max) for MAX9226+2.375V to +3.465V Core Supply VoltageParallel I/O Interfaces Directly to 1.8V to 3.3V Logic±15kV Human Body Model ESD Protection-40°C to +85°C Operating Temperature Range
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipset
Ordering Information
19-3680; Rev 1; 12/07
PA R T T EM PA N G E
PIN -
PA C K A G E
PK G O D EO PA R K A X9 2 2 5 E TE - 40°C to + 85° C 16 TQ FN - E P *T1633- 4AD O AX 9225E TE + - 40°C to + 85° C 16 TQ FN - E P *T1633- 4AD O A X9 2 2 6 E TE - 40°C to + 85° C 16 TQ FN - E P *T1633- 4AD X AX 9226E TE + - 40°C to + 85° C 16 TQ FN - E P *T1633- 4AD X
EVALUATION KIT
AVAILABLE
+Denotes lead-free package.
*EP = Exposed paddle.
Typical Application Circuit
TIMING
AND
CONTROL
PARALLEL
SERIAL
PARALLEL
DATA OUT
TIMING AND CONTROL
OUTPUT
LATCH
PIXEL
CLOCK OUTDLL
LCDS
POWER-DOWN
CONTROL
SERIAL
PARALLEL
PARALLEL
DATA IN
PIXEL
CLOCK IN
INPUT
LATCH
MAX9225MAX9226
Pin Configurations appear at end of data sheet.
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipset
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS (MAX9225)
(VDD= +2.375V to +3.465V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +2.5V, TA= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND...........................................................-0.5V to +4.0V
VDDOto GND.........................................................-0.5V to +4.0V
Serial Interface (SDO+, SDO-, SDI+,
SDI-) to GND.....................................................-0.5V to +4.0V
Single-Ended Inputs (DIN_, PCLKIN,
PWRDN) to GND....................................-0.5V to (VDD+ 0.5V)
Single-Ended Outputs (DOUT_,
PCLKOUT) to GND..............................-0.5V to (VDDO+ 0.5V)
Continuous Power Dissipation (TA= +70°C)
16-Pin TQFN (3mm x 3mm x 0.8mm)
Multilayer PCB (derate 20.8mW/°C
above +70°C).............................................................1667mW
Single-Layer PCB (derate 15.6mW/°C
above +70°C).............................................................1250mW
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
ESD Protection (Human Body Model)
SDO+, SDO-, SDI+, SDI- to GND...............................>±15kV
All Other Pins to GND...................................................>±2kV
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SINGLE-ENDED INPUTS (PCLKIN, DIN_, PWRDN)
High-Level Input VoltageVIH1.19VDD + 0.3V
Low-Level Input VoltageVIL-0.3+0.3V
VIN = 0V to VDD-20+20
-0.3V ≤ VIN < 0VInput CurrentIIN
VDD < VIN ≤ (VDD + 0.3V)-100+100µA
LCDS OUTPUT (SDO+, SDO-)
IODHHigh level575643880Differential Output CurrentIODLLow level200229300µA
Output Short-Circuit CurrentIOSShorted to 0V or VDD880µA
POWER SUPPLY
PCLKIN = 10MHz,
100Mbps4.78.2
Supply CurrentIDDVDD = 2.5VPCLKIN = 20MHz,
200Mbps6.28.2
PCLKIN = 10MHz,
100Mbps4.710.6
Worst-Case Pattern Supply CurrentIDDWVDD = 2.5V,
Figure 1PCLKIN = 20MHz,
200Mbps6.210.6
Power-Down Supply CurrentIDDZAll inputs = low0.5µA
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipset
DC ELECTRICAL CHARACTERISTICS (MAX9226)
(VDD= +2.375V to +3.465V, VDDO= +1.71V to +3.465V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD=
VDDO= +2.5V, TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SINGLE-ENDED OUTPUTS (PCLKOUT, DOUT_)
High-Level Output VoltageVOHVDDO = +2.375V to +3.465V, IOH = -1mA0.8 x VDDOV
Low-Level Output VoltageVOLVDDO = +2.375V to +3.465V, IOL = 1mA0.2V
VDDO = 2.375V-2
VDDO = 3.135V-9Output Short-Circuit CurrentIOSOutput shorted
to ground
VDDO = 3.465V-25
LCDS INPUT (SDI+, SDI-)
Differential Input-Current ThresholdIID400µA
Common-Mode Input CurrentIIC-300±400+300µA
IIC = 0µA, VDD = 3.3V ±5%6990114
IIC = 0µA, VDD = 2.8V ±5%82108137
IIC = 0µA, VDD = 2.5V ±5%95125161
IIC = ±300µA, VDD = 3.3V ±5%6791117
Differential Input ImpedanceZID
IIC = ±300µA, VDD = 2.8V ±5%86108141
Common-Mode Input ImpedanceZICIIC = ±300µA90167375Ω
Input CapacitanceCINSDI+ or SDI- to ground2pF
POWER SUPPLY
PCLKOUT = 10MHz,
100Mbps8.412
Supply CurrentITOTVDD = VDDO = 2.5V
(Note 4)PCLKOUT = 20MHz,
200Mbps9.112
PCLKOUT = 10MHz,
100Mbps9.712
Worst-Case Pattern
Supply CurrentITOTW
CL = 5pF, VDD =
VDDO = 2.5V,
Figure 2 (Note 4)PCLKOUT = 20MHz,
200Mbps11.613
Power-Down Supply CurrentITOTZ(Note 4)0.33.0µA
Supply DifferenceVSDMAX9225 VDD to MAX9226 VDD-5+5%
GROUND POTENTIAL
Ground DifferenceVGDMAX9225 to MAX9226 ground difference-0.2+0.2V
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipset
AC ELECTRICAL CHARACTERISTICS (MAX9225)
(VDD= +2.375V to +3.465V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +2.5V, TA= +25°C.) (Note 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
PCLKIN INPUT REQUIREMENTS (Figure 3)
Input Rise TimetR2ns
Input Fall TimetF2ns
PCLKIN PeriodtP50100ns
High-Level Pulse WidthtPWH0.3 x tP0.7 x tPns
Low-Level Pulse WidthtPWL0.3 x tP0.7 x tPns
Setup TimetS3ns
Hold TimetH1ns
AC ELECTRICAL CHARACTERISTICS (MAX9226)
(VDD= VDDO= +2.375V to +3.465V, CL= 5pF, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= VDDO=
+2.5V, TA= +25°C.) (Notes 3, 5)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
PCLKOUT PeriodtPFigure 450100ns
High-Level Pulse WidthtPWHFigure 40.4 x tP0.6 x tPns
Low-Level Pulse WidthtPWLFigure 40.4 x tP0.6 x tPns
Data Valid Before PCLKOUTtVBFigure 45ns
Data Valid After PCLKOUTtVAFigure 45ns
SERIALIZER AND DESERIALIZER LINK
tPU1From VDD = VDDO = 2.375V when supplies
are ramping up
11,264 xPower-Up Time
tPU2From PWRDN low to high4096 x
Power-Down TimetPWRDNFrom PWRDN high to low2.810µs
Note 1:Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground.
Note 2:Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at TA= +85°C.
Note 3:Parameters are guaranteed by design and characterization and are not production tested. Limits are set at ±6 sigma.
Note 4:ITOT= IDD+ IDDO.
Note 5:CLincludes probe and test jig capacitance.
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipsetest Circuits/Timing Diagrams
VIL
VIH
VIH
tPWL
VIL
VIH
PCLKIN
tPWH
VIL
VIH
VIL
VIH
VIH IS THE MINIMUM HIGH-LEVEL INPUT, AND VIL IS THE MAXIMUM LOW-LEVEL INPUT (SEE THE DC ELECTRICAL CHARACTERISTICS TABLE)
DIN_
PWRDN
Figure 3. Serializer Input Timing
ODD DIN_
EVEN DIN_
PCLKIN
Figure 1. Serializer Worst-Case Switching Pattern
ODD DOUT_
EVEN DOUT_
PCLKOUT
Figure 2. Deserializer Worst-Case Switching Pattern
tVB
VOL
VOHVOH
tPWL
tVA
VOL
VOH
PCLKOUT
tPWH
VOL
VOH
VOL
VOHDOUT_
VOH IS THE MINIMUM HIGH-LEVEL OUTPUT, AND VOL IS THE MAXIMUM LOW-LEVEL OUTPUT (SEE THE DC ELECTRICAL CHARACTERISTICS TABLE)
Figure 4. Deserializer Output Timing
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipset
Typical Operating Characteristics
(VDD= VDDO= +2.8V, logic input levels = 0 to +2.8V, logic output load CL= 5pF, TA= +25°C, unless otherwise noted.)
MAX9225
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9225 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DIN[9:0] = ALL LOW
PCLKIN = 20MHz
PCLKIN = 10MHz
MAX9225
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9225 toc02
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DIN[9:0] = ALL HIGH
PCLKIN = 20MHz
PCLKIN = 10MHz
MAX9225
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9225 toc03
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DIN[9:0] = WORST-CASE SWITCHING PATTERN
PCLKIN = 20MHz
PCLKIN = 10MHz
MAX9225
SUPPLY CURRENT vs. FREQUENCY
MAX9225 toc04
FREQUENCY (MHz)
SUPPLY CURRENT (mA)16141220
DIN[9:0] = ALL LOW
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
MAX9225
SUPPLY CURRENT vs. FREQUENCY
MAX9225 toc05
FREQUENCY (MHz)
SUPPLY CURRENT (mA)16141220
DIN[9:0] = ALL HIGH
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
MAX9225
SUPPLY CURRENT vs. FREQUENCY
MAX9225 toc06
FREQUENCY (MHz)
SUPPLY CURRENT (mA)16141220
DIN[9:0] = WORST-CASE SWITCHING PATTERN
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
MAX9225 POWER-DOWN
SUPPLY CURRENT vs. FREQUENCY
MAX9225 toc07
SUPPLY VOLTAGE (MHz)
SUPPLY CURRENT (
PCLKIN = LOW
PWRDN = LOW
DIN[9:0] = ALL LOW
MAX9226
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9226 toc08
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DIN[9:0] = ALL LOW
PCLKOUT = 20MHz
PCLKOUT = 10MHz
MAX9226
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9226 toc09
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DIN[9:0] = ALL HIGH
PCLKOUT = 20MHz
PCLKOUT = 10MHz
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipset
MAX9226
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9226 toc10
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DIN[9:0] = WORST-CASE SWITCHING PATTERN
PCLKOUT = 20MHz
PCLKOUT = 10MHz
MAX9226
SUPPLY CURRENT vs. FREQUENCY
MAX9226 toc11
FREQUENCY (MHz)
SUPPLY CURRENT (mA)16141220
DIN[9:0] = ALL LOW
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
MAX9226
SUPPLY CURRENT vs. FREQUENCY
MAX9226 toc12
FREQUENCY (MHz)
SUPPLY CURRENT (mA)16141220
DIN[9:0] = ALL HIGH
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
MAX9226 DOUT OUTPUT-LOW VOLTAGE
vs. SINK CURRENT
MAX9226 toc16
SINK CURRENT (mA)
DOUT (mV)
VDDO = +1.71V TO +2.375V
MAX9226 DIFFERENTIAL INPUT
IMPEDANCE vs. SUPPLY VOLTAGE
MAX9226 toc17
SUPPLY VOLTAGE (V)
INPUT IMPEDANCE (
Typical Operating Characteristics (continued)
(VDD= VDDO= +2.8V, logic input levels = 0 to +2.8V, logic output load CL= 5pF, TA= +25°C, unless otherwise noted.)
MAX9226
SUPPLY CURRENT vs. FREQUENCY
MAX9226 toc13
FREQUENCY (MHz)
SUPPLY CURRENT (mA)16141220
DIN[9:0] = WORST-CASE SWITCHING PATTERN
VDD = 3.3V
VDD = 2.8V
VDD = 2.5V
MAX9226 POWER-DOWN
SUPPLY CURRENT vs. FREQUENCY
MAX9226 toc14
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
SDI+/SDI- PULLED UP TO VDD
DOUT[9:0] = ALL LOW
MAX9226 DOUT OUTPUT-HIGH VOLTAGE
vs. SOURCE CURRENT
MAX9226 toc15
SOURCE CURRENT (mA)
DOUT (V)
VDDO = 2.375V
VDDO = 2V
VDDO = 1.71V
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipset
Pin Description (MAX9225)
PINNAMEFUNCTION
1–7,
14, 15, 16
DIN6–DIN0,
DIN9, DIN8, DIN7
Single-Ended Parallel Data Inputs. The 10 data bits are loaded into the input latch on the rising
edge of PCLKIN. 1.71V to 3.465V tolerant. Internally pulled down to GND.PCLKINParallel Clock Input. The rising edge of PCLKIN (typically the pixel clock) latches the parallel
data input. Internally pulled down to GND.PWRDNPower-Down Input. Pull PWRDN low to place the MAX9225/MAX9226 in power-down mode.
Drive PWRDN high for normal operation. Internally pulled down to GND.SDO-Inverting LCDS Serial-Data OutputSDO+Noninverting LCDS Serial-Data OutputGNDGroundVDDCore Supply Voltage. Bypass to GND with 0.1µF and 0.01µF capacitors in parallel as close to
the device as possible with the smallest value capacitor closest to the supply pin.EPExposed Paddle. Connect EP to ground.
Pin Description (MAX9226)
PINNAMEFUNCTIONGNDGroundSDI+Noninverting LCDS Serial-Data InputSDI-Inverting LCDS Serial-Data Input
4VDDCore Supply Voltage. Bypass to GND with 0.1µF and 0.01µF capacitors in parallel as close to
the device as possible, with the smallest value capacitor closest to the supply pin.PCLKOUTParallel Clock Output. Parallel output data are valid on the rising edge of PCLKOUT (typically
the pixel clock).
6–15DOUT0–DOUT9Single-Ended Parallel Data Output. DOUT[9:0] are valid on the rising edge of PCLKOUT.VDDOOutput Supply Voltage. Bypass to GND with 0.1µF and 0.01µF capacitors in parallel as close to
the device as possible with the smallest value capacitor closest to the supply pin.EPExposed Paddle. Connect EP to ground.

Partno	Mfg	Dc	Qty	Available	Descript
MAX9225ETE	MAX	N/a	10	avai	10-Bit, Low-Power, 10MHz-to-20MHz Serializer and Deserializer Chipset