MAX9179EUE Fast Delivery |IC PHOENIX CO.,LIMITED

MAX9179EUE ,Quad LVDS Receiver with HysteresisApplicationsLaser PrintersOrdering InformationDigital CopiersPART TEMP RANGE PIN-PACKAGECell-Phone ..
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MB88346L ,D/A Converter for Digital Tuning (12-channel, 8-bit, on-chip OP amp, low-voltage)FUJITSU SEMICONDUCTORDS04-13511-2EDATA SHEETLinear IC ConverterCMOSD/A Converter for Digital Tuni ..
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MB88347L ,D/A Converter for Digital Tuning (8-channel, 8-bit, on-chip OP amp, low-voltage)FEATURES• Ultra-low power consumption (0.5 mW/ch: typical)• Low voltage operation (VCC = 2.7 to 3. ..
MB88347L ,D/A Converter for Digital Tuning (8-channel, 8-bit, on-chip OP amp, low-voltage)FEATURES• Ultra-low power consumption (0.5 mW/ch: typical)• Low voltage operation (VCC = 2.7 to 3. ..

MAX9179EUE
Quad LVDS Receiver with Hysteresis
General Description
The MAX9179 is a quad low-voltage differential
signaling (LVDS) line receiver designed for applications
requiring high data rates, low power dissipation, and
noise immunity. The receiver accepts four LVDS input
signals and translates them to 3.3V LVCMOS output lev-
els at speeds up to 400Mbps. The receiver features
built-in hysteresis, which improves noise immunity and
prevents multiple switching on slow transitioning inputs.
The device supports a wide 0.038V to 2.362V common-
mode input voltage range, allowing for ground potential
differences and common-mode noise between the driver
and the receiver. A fail-safe circuit sets the output high
when the input is open, undriven and shorted, or undriven
and terminated. Common enable inputs control the high-
impedance outputs.
The MAX9179 has a flow-through pinout for easy PC
board layout, and is pin compatible with the MAX9121
and the DS90LV048A with the additional features of
high ESD tolerance and built-in hysteresis.
The MAX9179 operates from a single 3.3V supply, and is
specified for operation from -40°C to +85°C. The device
is offered in 16-pin TSSOP and thin QFN packages.
Applications
Laser Printers
Digital Copiers
Cell-Phone Base Stations
Telecom Switching Equipment
LCD Displays
Network Switches/Routers
Backplane Interconnect
Clock Distribution
FeaturesGuaranteed 400Mbps Data Rate50mV (typ) HysteresisOvershoot/Undershoot Protection (-1.0V or VCC+
1.0V) on EnablesIEC61000-4-2 Level 4 ESD ToleranceAC Specifications Guaranteed with |VID|= 100mVSingle 3.3V SupplyFail-Safe CircuitFlow-Through Pinout
Simplifies PC Board Layout
Reduces CrosstalkLow-Power CMOS DesignConforms to ANSI TIA/EIA-644 LVDS StandardHigh-Impedance Inputs when Powered OffPin Compatible with the MAX9121 and the
DS90LV048ASmall Thin QFN Package Available
MAX9179
Quad LVDS Receiver with Hysteresis
Ordering Information
19-2752; Rev 0; 2/03
PARTTEMP RANGEPIN-PACKAGE
MAX9179EUE-40°C to +85°C16 TSSOP
MAX9179ETE*-40°C to +85°C16 Thin QFN-EP**
IN1-EN
OUT1
OUT2
VCC
GND
OUT3
OUT4
TOP VIEW
MAX9179
TSSOP
THIN QFN(LEADS UNDER PACKAGE)
IN1+
IN2+
IN3+
IN2-
IN3-
IN4+
IN4-
IN2+
IN2-
IN3-
IN3+
OUT4IN4-IN4+
OUT2
VCC
GND
OUT3
OUT1IN1-IN1+EN
MAX9179
EXPOSED PAD78151413
Pin Configurations
Functional Diagram appears at end of data sheet.
*Future product—contact factory for availability.
**EP = Exposed paddle.
MAX9179
Quad LVDS Receiver with Hysteresis
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC= 3.0V to 3.6V, differential input voltage |VID| = 0.075V to 1.2V, input common-mode voltage VCM= |VID/2| to 2.4V - |VID/2|, = -40°C to +85°C, unless otherwise noted. Typical values are at VCC= 3.3V, |VID| = 0.2V, VCM= 1.2V, TA= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.0V
IN_+, IN_- to GND.................................................-0.3V to +4.0V
EN, ENto GND...........................................-1.4V to (VCC+ 1.4V)
OUT_ to GND.............................................-0.3V to (VCC+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
16-Pin TSSOP (derate 9.4mW/°C above +70°C).........755mW
16-Pin Thin QFN (derate 16.9mW/°C
above +70°C).............................................................1349mW
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection
Human Body Model (RD= 1.5kΩ, CS= 100pF)
(IN_+, IN_-)................................................................±16kV
IEC61000-4-2 (RD= 330Ω, CS= 150pF) (IN_+, IN_-)
Contact Discharge.......................................................±8kV
Air-Gap Discharge.....................................................±15kV
Soldering Temperature (soldering, 10s)..........................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
INPUTS (IN_+, IN_-)
Differential Input High ThresholdVTHFigure 12575mV
Differential Input Low ThresholdVTLFigure 1-75-25mV
HysteresisVTH - VTLFigure 150mV
Input CurrentIIN+, IIN--20+20µA
Power-Off Input CurrentIOFF+,
IOFF-VCC = 0V-20+20µA
Fail-Safe Input Resistor 1RIN1VCC = 3.6V or 0V, Figure 24065kΩ
Fail-Safe Input Resistor 2RIN2VCC = 3.6V or 0V, Figure 2280455kΩ
OUTPUTS (OUT_)
Open, undriven short, or
undriven parallel
terminationOutput High VoltageVOHIOH = -4.0mA
VID = +50mV
VCC -
VCC -
0.1V
Output Low VoltageVOLIOL = 4.0mA, VID = -50mV0.10.25V
Output Short-Circuit CurrentIOSEnabled, VID = +50mV, VOUT = 0 (Note 3)-40-70-120mA
Output High-Impedance CurrentIOZDisabled, VOUT = 0 or VCC-1.0+1.0µA
ENABLE INPUTS (EN, EN)
Input High VoltageVIH2.0VCC +
1.0V
Input Low VoltageVIL-1.0+0.8V
-1.0V ≤ EN, EN ≤ 0V-1800+10
0V ≤ EN, EN ≤ VCC-20+20Input CurrentIIN
VCC ≤ EN, EN ≤ VCC + 1.0V-10+1800
POWER SUPPLY
Supply CurrentICCEnabled, inputs open10.415
Disabled Supply CurrentICCZDisabled, inputs open0.61.0mA
MAX9179
Quad LVDS Receiver with Hysteresis
Note 1:Maximum and minimum limits over temperature are guaranteed by design and characterization. Parts are production
tested at TA= +25°C.
Note 2:Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except VTH, VTL, and VID.
Note 3:Short one output at a time.
Note 4:AC parameters are guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 5:CLincludes scope probe and test jig capacitance.
Note 6:Pulse generator differential output for all tests (unless otherwise noted): tR= tF< 1ns (0% to 100%), frequency = 100MHz,
50% duty cycle.
Note 7:tSKD1is the magnitude of the difference of the differential propagation delays in a channel. tSKD1= | tPHLD- tPLHD|.
Note 8:tSKD2is the magnitude of the difference of the tPLHDor tPHLDof one channel and the tPLHDor tPHLDof the other channel
on the same part.
Note 9:tSKD3is the magnitude of the difference of any differential propagation delays between parts at the same VCCand within
5°C of each other.
Note 10:tSKD4is the magnitude of the difference of any differential propagation delays between parts operating over the rated
supply and temperature ranges.
Note 11:Pulse generator output for tPHZ, tPLZ, tPZH, and tPZLtests: tR= tF= 1.5ns (0.2VCCto 0.8VCC), 50% duty cycle, VOH=
VCC+ 1.0V settling to VCC, VOL= -1.0V settling to 0, frequency = 1MHz.
AC ELECTRICAL CHARACTERISTICS
(VCC= 3.0V to 3.6V, CL= 15pF, differential input voltage |VID| = 0.1V to 1.2V, input common-mode voltage VCM= |VID/2| to 2.4V - |VID/2|,= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= 3.3V, |VID| = 0.2V, VCM= 1.2V, TA= +25°C.) (Notes 4, 5, 6)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Differential Propagation Delay
High to LowtPHLDFigures 3, 42.02.64.6ns
Differential Propagation Delay
Low to HightPLHDFigures 3, 42.02.524.6ns
|VID| = 0.1V to 0.15V700
|VID| = 0.15V to 0.2V400Differential Pulse Skew
| tPHLD - tPLHD | (Note 7)tSKD1
|VID| = 0.2V to 1.2V80300
|VID| = 0.1V to 0.15V900
|VID| = 0.15V to 0.2V600
Differential Channel-to-Channel
Skew, Same Part
(Note 8)
tSKD2
|VID| = 0.2V to 1.2V120400
Differential Part-to-Part Skew
(Note 9)tSKD32.0ns
Differential Part-to-Part Skew
(Note 10)tSKD42.6ns
Rise TimetTLH0.771.4ns
Fall TimetTHL0.741.4ns
Disable Time High to ZtPHZRL = 2kΩ, Figures 5, 6 (Note 11)10.614ns
Disable Time Low to ZtPLZRL = 2kΩ, Figures 5, 6 (Note 11)1114ns
Enable Time Z to HightPZHRL = 2kΩ, Figures 5, 6 (Note 11)4.814ns
Enable Time Z to LowtPZLRL = 2kΩ, Figures 5, 6 (Note 11)4.814ns
Maximum Operating FrequencyfMAX
All channels switching, CL = 15pF, VOL
(max) = 0.25V, VOH (min) = VCC - 0.2V,
44% < duty cycle < 56%
200250MHz
MAX9179
Quad LVDS Receiver with Hysteresis
Test Circuits/Timing Diagrams
VOUT
VOH
VTL
-VID+VIDVOL
VTH
HYSTERESIS
VID = 0
Figure 1. Input Thresholds and Hysteresis
VCC
VCC - 0.3V
RIN2
RIN1
RIN1
IN_+
OUT_
IN_-
Figure 2. Fail-Safe Input Circuit
OUT_
50Ω50Ω
IN_-
IN_+
PULSE
GENERATOR
Figure 3. Propagation Delay and Transition Time Test Circuit
0.9VCC
0.5VCC
0.1VCC
0.9VCC
0.5VCC
0.1VCC
IN_-
IN_+
(0V DIFFERENTIAL)VID
tPHLDtPLHD
tTLHtTHL
VCM = ((VIN_+) + (VIN_-))/2
OUT_
Figure 4. Propagation Delay and Transition Time Waveforms
50Ω
PULSE
GENERATOR
CL INCLUDES LOAD AND TEST JIG CAPACITANCE.
S1 = VCC FOR tPZL AND tPLZ MEASUREMENTS.
S1 = 0 FOR tPZH AND tPHZ MEASUREMENTS.
DEVICE
UNDER
TESTEN
IN_+
VCCS1
OUT_
IN_-
Figure 5. High-Impedance Delay Test Circuit
VCC + 1.0V
VCC
-1.0V
VCC + 1.0V
VCC
-1.0V
VCC
VOL
VOH
EN WHEN EN = LOW OR OPEN
EN WHEN EN = HIGH
OUT_ WHEN VID = -75mV
OUT_ WHEN VID = +75mV
1.5V1.5V
1.5V1.5V
tPZL
tPLZ
tPHZtPZH
0.5V
0.5V
50%
50%
Figure 6. High-Impedance Delay Waveforms
Typical Operating Characteristics
(VCC= 3.3V, VCM= 1.2V, |VID| = 0.15V, CL= 15pF, f = 100MHz, TA= +25°C, unless otherwise noted.)
MAX9179
Quad LVDS Receiver with Hysteresis
SUPPLY CURRENT vs. FREQUENCY
MAX9179 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
ALL CHANNELS DRIVEN
SUPPLY CURRENT
vs. TEMPERATURE
MAX9179 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)3510-15
INPUTS OPEN
DC DIFFERENTIAL THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE
MAX9179 toc03
SUPPLY VOLTAGE (V)
DC DIFFERENTIAL THRESHOLD VOLTAGE (mV)
VTH
VTL
OUTPUT SHORT-CIRCUIT CURRENT
vs. SUPPLY VOLTAGE
MAX9179 toc04
SUPPLY VOLTAGE (V)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
DC INPUT
(VID = +150mV)
OUTPUT HIGH VOLTAGE
vs. SUPPLY VOLTAGE
MAX9179 toc05
SUPPLY VOLTAGE (V)
OUTPUT HIGH VOLTAGE (V)
DC INPUT
(VID = +150mV)
IOH = -4mA
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9179 toc07
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
OUTPUT LOW VOLTAGE
vs. SUPPLY VOLTAGE
MAX9179 toc06
SUPPLY VOLTAGE (V)
OUTPUT LOW VOLTAGE (mV)
DC INPUT
(VID = -150mV)
IOL = 4mA
Typical Operating Characteristics (continued)
(VCC= 3.3V, VCM= 1.2V, |VID| = 0.15V, CL= 15pF, f = 100MHz, TA= +25°C, unless otherwise noted.)
MAX9179
Quad LVDS Receiver with Hysteresis
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
MAX9179 toc08
TEMPERATURE (°C)
DIFFERENTIAL PROPAGATION DELAY (ns)3510-15
tPHLD
tPLHD
DIFFERENTIAL PROPAGATION DELAY
vs. COMMON-MODE VOLTAGE
MAX9179 toc09
COMMON-MODE VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
DIFFERENTIAL PROPAGATION DELAY
vs. DIFFERENTIAL INPUT VOLTAGE
MAX9179 toc10
DIFFERENTIAL INPUT VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
DIFFERENTIAL PULSE SKEW
vs. SUPPLY VOLTAGE
MAX9179 toc11
SUPPLY VOLTAGE (V)
DIFFERENTIAL PULSE SKEW (ps)
TRANSITION TIME
vs. SUPPLY VOLTAGE
MAX9179 toc12
SUPPLY VOLTAGE (V)
TRANSITION TIME (ps)
tTLH
tTHL
TRANSITION TIME vs. TEMPERATURE
MAX9179 toc13
TEMPERATURE (°C)
TRANSITION TIME (ps)3510-15
tTLH
tTHL
DIFFERENTIAL THRESHOLD VOLTAGE
vs. COMMON-MODE VOLTAGE
MAX9179 toc14
COMMON-MODE VOLTAGE (V)
DIFFERENTIAL THRESHOLD VOLTAGE (mV)
VTH
VTL

Partno	Mfg	Dc	Qty	Available	Descript
MAX9179EUE	MAXIM	N/a	2462	avai	Quad LVDS Receiver with Hysteresis