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MAX9129EUE+ |MAX9129EUEMAXIMN/a2avaiQuad Bus LVDS Driver with Flow-Through Pinout
MAX9129EUE+T |MAX9129EUETMAXIMN/a756avaiQuad Bus LVDS Driver with Flow-Through Pinout
MAX9129EUEMAXIMN/a2500avaiQuad Bus LVDS Driver with Flow-Through Pinout
MAX9129EUE+ |MAX9129EUEMAXN/a760avaiQuad Bus LVDS Driver with Flow-Through Pinout


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MAX9129EUE-MAX9129EUE+-MAX9129EUE+T
Quad Bus LVDS Driver with Flow-Through Pinout
General Description
The MAX9129 is a quad bus low-voltage differential sig-
naling (BLVDS) driver with flow-through pinout. This
device is designed to drive a heavily loaded multipoint
bus with controlled transition times (1ns 0% to 100%
minimum) for reduced reflections. The MAX9129
accepts four LVTTL/LVCMOS input levels and trans-
lates them to output levels of 250mV to 450mV (stan-
dard LVDS levels) into a 27Ωload at speeds up to
200Mbps (100MHz).
The power-on reset ensures that all four outputs are
disabled and high impedance during power up and
power down. The outputs can be set to high imped-
ance by two enable inputs, EN and EN, thus dropping
the device to a low-power state of 11mW. The enables
are common to all four drivers. The flow-through pinout
simplifies PC board layout and reduces crosstalk by
keeping the LVTTL/LVCMOS inputs and BLVDS outputs
separated.
The MAX9129 operates from a single +3.3V supply and
is specified for operation from -40°C to +85°C. It is
available in 16-pin QFN and TSSOP packages. Refer to
the MAX9121 data sheet for a quad LVDS line receiver
with flow-through pinout.
Applications

Cell Phone Base Stations
Add/Drop Muxes
Digital Cross-Connects
DSLAMs
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Features
Drive LVDS Levels into a 27ΩLoad1ns (0% to 100%) Minimum Transition Time
Reduces Reflections
Guaranteed 200Mbps (100MHz) Data RateEnable Pins for High-Impedance OutputHigh-Impedance Outputs when Powered OffGlitch-Free Power-Up and Power-DownHot SwappableFlow-Through PinoutAvailable in Tiny QFN Package (50% Smaller
than TSSOP)
Single +3.3V Supply
MAX9129
Quad Bus LVDS Driver with
Flow-Through Pinout

MAX9129MAX9121MAX9129MAX9121MAX9129MAX9121MAX9129MAX9121Rt
BUS A
BUS BRt
CARD 1ACARD 10ACARD 1BCARD 2B
= TERMINATION
RESISTORRt
MULTIPOINT FULL-DUPLEX TRANSMIT AND RECEIVE BUSypical Applications Circuit
19-2100; Rev 0; 8/01
Functional Diagram appears at end of data sheet.
Pin Configurations appear at end of data sheet.
Ordering Information
PARTTEMP. RANGEPIN-PACKAGE

MAX9129EGE-40°C to +85°C16 QFN
MAX9129EUE-40°C to +85°C16 TSSOP
MAX9129
Quad Bus LVDS Driver with
Flow-Through Pinout
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.0V
IN_, EN, ENto GND....................................-0.3V to (VCC+ 0.3V)
OUT_+, OUT_- to GND..........................................-0.3V to +4.0V
Short-Circuit Duration (OUT_+, OUT_-).....................Continuous
Continuous Power Dissipation (TA= +70°C)
16-Pin QFN (derate 18.5mW/°C above +70°C).........1481mW
16-Pin TSSOP (derate 9.4mW/°C above +70°C).........755mW
Storage Temperature Range.............................-65°C to +150°C
Maximum Junction Temperature.....................................+150°C
Operating Temperature Range...........................-40°C to +85°C
ESD Protection
Human Body Model, OUT_+, OUT_-...............................±8kV
Lead Temperature (soldering, 10s).................................+300°C
DC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, RL= 27Ω±1%, EN = high, EN= low, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC
= +3.3V, TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
BLVDS OUTPUTS (OUT_+, OUT_-)

Differential Output VoltageVODFigure 1250371450mV
Change in Magnitude of VOD
Between Complementary Output
States
ΔVODFigure 1125mV
Offset VoltageVOSFigure 11.1251.291.375V
Change in Magnitude of VOS
Between Complementary Output
States
ΔVOSFigure 1525mV
Output High VoltageVOH1.4651.6V
Output Low VoltageVOL0.901.085V
Differential Output Short-Circuit
CurrentIOSDVOD = 020mA
Output Short-Circuit CurrentIOSOUT_+ = 0 at IN_ = VCC or
OUT_- = 0 at IN_ = 0-20mA
Output High-Impedance CurrentIOZDisabled, OUT_+ = 0 or VCC, OUT_- = 0
or VCC-11µA
Power-Off Output CurrentIOFFVCC = 0 or open, EN = EN = IN_ = 0,
OUT_+ = 0 or 3.6V, OUT_- = 0 or 3.6V-11µA
Output CapacitanceCOUTC ap aci tance fr om OU T_+ or O U T_- to G N D 4.3pF
INPUTS (IN_, EN, EN)

High-Level Input VoltageVIH2.0VCCV
Low-Level Input VoltageVILGND0.8V
Input CurrentIININ_, EN, EN = 0 or VCC-1515µA
SUPPLY CURRENT

Supply CurrentICCRL = 27Ω, IN_ = VCC or 0 for all channels5870mA
Disabled Supply CurrentICCZDisabled3.25mA
MAX9129
Quad Bus LVDS Driver with
Flow-Through Pinout
AC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, RL= 27Ω±1%, CL= 15pF, EN = high, EN= low, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at VCC= +3.3V, TA= +25°C.) (Notes 3, 4, 5)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Differential Propagation Delay
High to LowtPHLDFigures 2 and 31.01.983.0ns
Differential Propagation Delay
Low to HightPLHDFigures 2 and 31.01.923.0ns
Differential Pulse Skew (Note 6)tSKD1Figures 2 and 3300ps
Differential Channel-to-Channel
Skew (Note 7)tSKD2Figures 2 and 3450ps
Differential Part-to-Part Skew
(Note 8)tSKD3Figures 2 and 31.2ns
Differential Part-to-Part Skew
(Note 9)tSKD4Figures 2 and 32.0ns
MAX9129EGE0.601.191.55Rise TimetTLHFigures 2 and 3MAX9129EUE0.601.091.40ns
MAX9129EGE0.601.121.55Fall TimetTHLFigures 2 and 3MAX9129EUE0.601.021.40ns
Disable Time High to ZtPHZFigures 4 and 58ns
Disable Time Low to ZtPLZFigures 4 and 58ns
Enable Time Z to HightPZHFigures 4 and 510ns
Enable Time Z to LowtPZLFigures 4 and 510ns
Maximum Operating Frequency
(Note 10)fMAXFigure 2100MHz
Note 1:
Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are 100% tested
at TA= +25°C.
Note 2:
Current into the device is defined as positive, and current out of the device is defined as negative. All voltages are
referenced to ground except VODand ΔVOD.
Note 3:
AC parameters are guaranteed by design and characterization.
Note 4:
CLincludes probe and jig capacitance.
Note 5:
Signal generator conditions: VOL= 0, VOH= VCC, f = 100MHz, 50% duty cycle, RO= 50Ω, tR= tF= 1ns (10% to 90%).
Note 6:
tSKD1is the magnitude difference of differential propagation delays. tSKD1= | tPHLD- tPLHD |.
Note 7:
tSKD2is the magnitude difference of tPHLDor tPLHDof one channel to the tPHLDor tPLHDof another channel on the
same device.
Note 8:
tSKD3is the magnitude difference of any differential propagation delays between devices at the same VCCand within 5°C
of each other.
Note 9:
tSKD4is the magnitude difference of any differential propagation delays between devices operating over the rated supply
and temperature ranges.
Note 10:
Signal generator conditions: VOL= 0, VOH= VCC, f = 100MHz, 50% duty cycle, RO= 50Ω, tR= tF= 1ns (10% to 90%).
MAX9129 output criteria: duty cycle = 45% to 55%, VOD≥250mV, all channels switching.
MAX9129
Quad Bus LVDS Driver with
Flow-Through Pinoutypical Operating Characteristics

(MAX9129EUE (TSSOP package), VCC= +3.3V, RL= 27Ω, CL = 15pF, TA= +25°C, unless otherwise noted.) (Note 5)
OUTPUT HIGH VOLTAGE
vs. SUPPLY VOLTAGE
MAX9129 toc01
SUPPLY VOLTAGE (V)
OUTPUT HIGH VOLTAGE (V)
OUTPUT LOW VOLTAGE
vs. SUPPLY VOLTAGE
MAX9129 toc02
SUPPLY VOLTAGE (V)
OUTPUT LOW VOLTAGE (V)
OUTPUT SHORT CURRENT (IOS)
vs. SUPPLY VOLTAGE
MAX9129 toc03
SUPPLY VOLTAGE (V)
OUTPUT SHORT CURRENT (mA)
OUTPUT HIGH-IMPEDANCE CURRENT
vs. SUPPLY VOLTAGE
MAX9129 toc04
SUPPLY VOLTAGE (V)
OUTPUT HIGH-IMPEDANCE CURRENT (pA)
VOUT_ = VCC OR 0
DIFFERENTIAL OUTPUT VOLTAGE vs.
SUPPLY VOLTAGE
MAX9129 toc05
SUPPLY VOLTAGE (V)
DIFFERENTIAL OUTPUT VOLTAGE (mV)
DIFFERENTIAL OUTPUT VOLTAGE
vs. LOAD RESISTANCE
MAX9129 toc06
LOAD RESISTANCE (Ω)
DIFFERENTIAL OUTPUT VOLTAGE (V)
OUTPUT OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
MAX9129 toc07
SUPPLY VOLTAGE (V)
OUTPUT OFFSET VOLTAGE (V)
SUPPLY CURRENT
vs. FREQUENCY
MAX9129 toc08
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX9129 toc09
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
MAX9129
Quad Bus LVDS Driver with
Flow-Through Pinout

SUPPLY CURRENT
vs. TEMPERATURE
MAX9129 toc10
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
DIFFERENTIAL PROPAGAION DELAY
vs. SUPPLY VOLTAGE
MAX9129 toc11
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
MAX9129 toc12
TEMPERATURE (°C)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
DIFFERENTIAL SKEW
vs. SUPPLY VOLTAGE
MAX9129 toc13
SUPPLY VOLTAGE (V)
DIFFERENTIAL SKEW (ps)
DIFFERENTIAL SKEW
vs. TEMPERATURE
MAX9129 toc14
TEMPERATURE (°C)
DIFFERENTIAL SKEW (ps)
TRANSITION TIME
vs. SUPPLY VOLTAGE
MAX9129 toc15
SUPPLY VOLTAGE (V)
TRANSITION TIME (ns)
tTLH
tTHL
20% TO 80%
Typical Operating Characteristics (continued)

(MAX9129EUE (TSSOP package), VCC= +3.3V, RL= 27Ω, CL = 15pF, TA= +25°C, unless otherwise noted.) (Note 5)
TRANSITION TIME
vs. TEMPERATURE
MAX9129 toc16
TEMPERATURE(°C)
TRANSITION TIME (ns)
tTLH
tTHL
20% TO 80%
MAX9129
Quad Bus LVDS Driver with
Flow-Through Pinout
PIN
QFNTSSOPNAMEFUNCTION
1EN
LVTTL/LVCMOS Enable Input. The driver is disabled when EN is low. EN is internally
pulled down. When EN = high and EN = low or open, the outputs are active. For other
combinations of EN and EN, the outputs are disabled and are high impedance.
1, 4, 5, 162, 3, 6, 7IN_LVTTL/LVCMOS Driver InputsVCCPower-Supply Input. Bypass VCC to GND with 0.1µF and 0.001µF ceramic capacitors.5GNDGroundENLVTTL/LVCMOS Enable Input. The driver is disabled when EN is high. EN is internally
pulled down.
7, 10, 11, 149, 12, 13, 16OUT_-Inverting BLVDS Driver Outputs
8, 9, 12, 1310, 11, 14, 15OUT_+Noninverting BLVDS Driver Outputs
Pin Description

Figure 3. Driver Propagation Delay and Transition Time Waveforms
VOH
VOL
IN_
OUT_ -
OUT_+
VOD
VCC
tPHLD
50%
tTHL
20%
80%80%
tTLH
20%
0 DIFFERENTIAL
tPLHD
50%
VOD = (VOUT_+) - (VOUT_-)
Figure 1. Driver VODand VOSTest Circuit
VOS
VCC
GND
IN_
RL/2
RL/2
VOSVOD
OUT_-
OUT_+
Figure 2. Driver Propagation Delay and Transition Time Test
Circuit
OUT_ +
OUT_ -
50Ω
IN_
GENERATOR
Detailed Description
The MAX9129 is a 200Mbps quad differential BLVDS
driver designed for multipoint, heavily loaded backplane
applications. This device accepts LVTTL/LVCMOS input
levels and translates them to output levels of 250mV to
450mV into a 27Ωload. The flow-through pinout simpli-
fies board layout and reduces the potential for crosstalk
between single-ended inputs and differential outputs.
Transition times are designed to reduce reflections, yet
enable high data rates. The MAX9129 can be used in
conjunction with standard quad LVDS receivers, such
as the MAX9121, to implement full-duplex multipoint
buses more efficiently than with transceivers.
Effect of Capacitive Loading

The characteristic impedance of a differential PC board
trace is uniformly reduced when equal capacitive loads
are attached at equal intervals (provided the transition
time of the signal being driven on the trace is longer
than the delay between loads). This kind of loading is
typical of multipoint buses where cards are attached at
1in or 0.8in intervals along the length of a backplane.
MAX9129
Quad Bus LVDS Driver with
Flow-Through Pinout
Table 1. Input/Output Function Table
ENABLESINPUTSOUTPUTS
ENIN_OUT_+OUT_ -HHL or openHHL
All other combinations of
EN and ENXZZ
Figure 4. Driver High-Impedance Delay Test Circuit
GND
IN_
OUT_-
OUT_+
1/4 MAX9129
GENERATOR+1.2V
50Ω
RL/2
RL/2
VCC
Figure 5. Driver High-Impedance Delay Waveform
50%
EN WHEN EN = 0 OR OPEN
EN WHEN EN = VCC
OUT_+ WHEN IN_ = 0
OUT_- WHEN IN_ = VCC
OUT_+ WHEN IN_ = VCC
OUT_- WHEN IN_ = 0
50%
50%
tPLZ
tPHZ
tPZL
tPZH
50%
VCC
VCC
1.2V
VOL
VOH
1.2V
50%50%
50%50%
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