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MAX7313AEGMAXN/a2424avai16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
MAX7313AEG+ |MAX7313AEGMAXN/a410avai16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
MAX7313AEG+T |MAX7313AEGTMAXIMN/a212avai16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
MAX7313ATG+ |MAX7313ATGMAXN/a17avai16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
MAX7313ATG+TMAXIMN/a4946avai16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
MAX7313DAEG+ |MAX7313DAEGMAXN/a9avai16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
MAX7313DATG+MAXIMN/a350avai16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
MAX7313DATG+ |MAX7313DATGMAXN/a100avai16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection


MAX7313ATG+T ,16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion ProtectionApplicationsSCL 19 12 P10LCD BacklightsSDA 20 11 P9LED Status IndicationV+ 21 10 P8Portable Equipme ..
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MAX7313DATG+ ,16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion ProtectionApplicationsSCL 19 12 P10LCD BacklightsSDA 20 11 P9LED Status IndicationV+ 21 10 P8Portable Equipme ..
MAX7313DATG+ ,16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion ProtectionELECTRICAL CHARACTERISTICS(Typical Operating Circuit, V+ = 2V to 3.6V, T = T to T , unless otherwis ..
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MAX7313AEG-MAX7313AEG+-MAX7313AEG+T-MAX7313ATG+-MAX7313ATG+T-MAX7313DAEG+-MAX7313DATG+
16-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
General Description
The MAX7313 I2C-compatible serial interfaced periph-
eral provides microprocessors with 16 I/O ports. Each
I/O port can be individually configured as either an
open-drain current-sinking output rated at 50mA and
5.5V, or a logic input with transition detection. A 17th
port can be used for transition detection interrupt, or as
a general-purpose output. The outputs are capable of
driving LEDs, or providing logic outputs with external
resistive pullup up to 5.5V.
PWM current drive is integrated with 8 bits of control.
Four bits are global control and apply to all LED outputs
to provide coarse adjustment of current from fully off to
fully on with 14 intensity steps. Each output then has
individual 4-bit control, which further divides the global-
ly set current into 16 more steps. Alternatively, the cur-
rent control can be configured as a single 8-bit control
that sets all outputs at once.
The MAX7313 is pin and software compatible with the
MAX7311, PCA9535, and PCA9555.
Each output has independent blink timing with two blink
phases. All LEDs can be individually set to be on or off
during either blink phase, or to ignore the blink control.
The blink period is controlled by a register.
The MAX7313 supports hot insertion. All port pins, the
INToutput, SDA, SCL, and the slave-address inputs
ADO-2 remain high impedance in power-down (V+ =0V)
with up to 6V asserted upon them.
The MAX7313 is controlled through the 2-wire2C/SMBus serial interface, and can be configured to
any one of 64 I2C addresses.
Applications

LCD Backlights
LED Status Indication
Portable Equipment
Keypad Backlights
RGB LED Drivers
Notebook Computers
Features
400kbs, 2-Wire Serial Interface, 5.5V Tolerant2V to 3.6V OperationOverall 8-Bit PWM LED Intensity Control
Global 16-Step Intensity Control
Individual 16-Step Intensity Controls
Two-Phase LED BlinkingHigh Output Current (50mA max Per Port)Outputs are 5.5V-Rated Open DrainSupports Hot InsertionInputs are Overvoltage Protected to 5.5VTransition Detection with Interrupt Output1.2µA (typ), 3.6µA (max) Standby CurrentSmall 4mm x 4mm TQFN Package-40°C to +125°C Temperature RangeAll Ports Can Be Configured as Inputs or Outputs
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection

TOP VIEW
TQFN
4mm x 4mm

MAX7313ATG34561716151413
SCL
SDA
INT/O16
AD2P1P2P3P4P5
AD0P15
P13
P12P11
AD1
P10
GND
*CONNECT EP TO GND
*EP+
P14
Pin Configurations

19-3059; Rev 5; 6/11
EVALUATION KIT
AVAILABLE
Ordering Information
PARTTEMP RANGEPIN-PACKAGE

MAX7313ATG+-40°C to +125°C24 TQFN-EP*
MAX7313AEG+-40°C to +125°C24 QSOP
Pin Configurations continued at end of data sheet.
Typical Application Circuit appears at end of data sheet.

+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed Pad.
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with respect to GND)
V+.............................................................................-0.3V to +4V
SCL, SDA, AD0, AD1, AD2, P0–P15........................-0.3V to +6V
INT/O16....................................................................-0.3V to +8V
DC Current on P0–P15, INT/O16........................................55mA
DC Current on SDA.............................................................10mA
Maximum GND Current....................................................350mA
Continuous Power Dissipation (TA= +70°C)
24-Pin QSOP (derate 9.5mW/°C over +70°C)..............761mW
24-TQFN (derate 20.8mW/°C over +70°C)................1666mW
Operating Temperature Range (TMINto TMAX)-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
ELECTRICAL CHARACTERISTICS

(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Operating Supply VoltageV+23.6V
Output Load External Supply
VoltageVEXT05.5V
TA = +25°C1.22.3
TA = -40°C to +85°C2.8Standby Current
(Interface Idle, PWM Disabled)I+C L and S D A at V + ; other i g i tal i np uts at V + or GN D ;WM i ntensi ty contr ol d i sab l ed TA = TMIN to TMAX3.6
TA = +25°C8.515.1
TA = -40°C to +85°C16.5Supply Current
(Interface Idle, PWM Enabled)I+C L and S D A at V + ; other i g i tal i np uts at V + or GN D ;WM i ntensi ty contr ol enab l ed TA = TMIN to TMAX17.2
TA = +25°C5095.3
TA = -40°C to +85°C99.2
Supply Current
(Interface Running, PWM
Disabled)
fSCL = 400kHz; other digital
inputs at V+ or GND; PWM
intensity control disabledTA = TMIN to TMAX102.4
TA = +25°C57110.2
TA = -40°C to +85°C117.4
Supply Current
(Interface Running, PWM
Enabled)
fSCL = 400kHz; other digital
inputs at V+ or GND; PWM
intensity control enabledTA = TMIN to TMAX122.1
Input High Voltage
SDA, SCL, AD0, AD1, AD2,
P0–P15
VIH0.7 ✕V
Input Low Voltage
SDA, SCL, AD0, AD1, AD2,
P0–P15
VIL0.3 ✕V
Input Leakage Current
SDA, SCL, AD0, AD1, AD2,
P0–P15
IIH, IILInput = GND or V+-0.2+0.2µA
Input Capacitance
SDA, SCL, AD0, AD1, AD2,
P0–P15
8pF
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
ELECTRICAL CHARACTERISTICS (continued)

(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA= + 25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

TA = +25°C0.150.26
TA = -40°C to +85°C0.3V+ = 2V, ISINK = 20mA
TA = TMIN to TMAX0.32
TA = +25°C0.130.23
TA = -40°C to +85°C0.26V+ = 2.5V, ISINK = 20mA
TA = TMIN to TMAX0.28
TA = +25°C0.120.23
TA = -40°C to +85°C0.24
Output Low Voltage
P0–P15, INT/O16VOL
V+ = 3.3V, ISINK = 20mA
TA = TMIN to TMAX0.26
Output Low-Voltage SDAVOLSDAISINK = 6mA0.4V
PWM Clock FrequencyfPWM32kHz
TIMING CHARACTERISTICS

(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Serial Clock FrequencyfSCL400kHz
Bus Free Time Between a STOP and a START
ConditiontBUF1.3µs
Hold Time, Repeated START ConditiontHD, STA0.6µs
Repeated START Condition Setup TimetSU, STA0.6µs
STOP Condition Setup TimetSU, STO0.6µs
Data Hold TimetHD, DAT(Note 2)0.9µs
Data Setup TimetSU, DAT180ns
SCL Clock Low PeriodtLOW1.3µs
SCL Clock High PeriodtHIGH0.7µs
Rise Time of Both SDA and SCL Signals, ReceivingtR(Notes 3, 4)20 +
0.1Cb300ns
Fall Time of Both SDA and SCL Signals, ReceivingtF(Notes 3, 4)20 +
0.1Cb300ns
Fall Time of SDA TransmittingtF.TX(Notes 2, 3, 5)20 +
0.1Cb250ns
Pulse Width of Spike SuppressedtSP(Notes 2, 6)50ns
Capacitive Load for Each Bus LineCb(Notes 2, 3)400pF
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
TIMING CHARACTERISTICS (continued)

(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Interrupt ValidtIVFigure 106.5µs
Interrupt ResettIRFigure 101µs
Output Data ValidtDVFigure 105µs
Input Data Setup TimetDSFigure 10100ns
Input Data Hold TimetDHFigure 101µs
Note 1:
All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2:
A master device must provide a hold time of at least 300ns for the SDA signal (referred to VILof the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 3:
Guaranteed by design.
Note 4:
Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VDDand 0.7 x VDD.
Note 5:
ISINK≤6mA. Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VDDand 0.7 x VDD.
Note 6:
Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
STANDBY CURRENT vs. TEMPERATURE

MAX7313 toc01
STANDBY CURRENT (
V+ = 3.6V
PWM ENABLED
V+ = 2.7V
PWM ENABLED
V+ = 2V
PWM DISABLED
V+ = 2.7V
PWM DISABLED
V+ = 3.6V
PWM
DISABLED
V+ = 2V
PWM ENABLED
SUPPLY CURRENT vs. TEMPERATURE
(PWM DISABLED; fSCL = 400kHz)

MAX7313 toc02
SUPPLY CURRENT (
V+ = 3.6V
V+ = 2.7V
V+ = 2V
SUPPLY CURRENT vs. TEMPERATURE
(PWM ENABLED; fSCL = 400kHz)

MAX7313 toc03
SUPPLY CURRENT (
V+ = 3.6V
V+ = 2.7V
V+ = 2V
__________________________________________Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
PORT OUTPUT LOW VOLTAGE WITH 50mA
LOAD CURRENT vs. TEMPERATURE

PORT OUTPUT LOW VOLTAGE V
(V)
MAX7313 toc04
TEMPERATURE (°C)
V+ = 3.6V
V+ = 2.7V
V+ = 2V
PORT OUTPUT LOW VOLTAGE WITH 20mA
LOAD CURRENT vs. TEMPERATURE

MAX7313 toc05
TEMPERATURE (°C)
PORT OUTPUT LOW VOLTAGE V
(V)
ALL OUTPUTS LOADED
V+ = 3.6VV+ = 2.7V
V+ = 2V
PWM CLOCK FREQUENCY
vs. TEMPERATURE

TEMPERATURE (°C)
PWM CLOCK FREQUENCY
V+ = 3.6V
V+ = 2VV+ = 2.7V
NORMALIZED TO V+ = 3.3V, TA = +25°C
SCOPE SHOT OF 2 OUTPUT PORTS

MAX7313 toc07
2ms/div
OUTPUT 1
2V/div
OUTPUT 2
2V/div
MASTER INTENSITY SET TO 1/15
OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16
OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 15/16
SCOPE SHOT OF 2 OUTPUT PORTS

MAX7313 toc08
2ms/div
OUTPUT 1
2V/div
OUTPUT 2
2V/div
OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16
MASTER INTENSITY SET TO 14/15
OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 14/15
MAX7313 toc09
SINK CURRENT vs. VOL

SINK CURRENT (mA)
(V)40302010
V+ = 2V
V+ = 2.7V
ONLY ONE OUTPUT LOADED
V+ = 3.3V
V+ = 3.6V
Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)
MAX7313
Functional Overview

The MAX7313 is a general-purpose input/output (GPIO)
peripheral that provides 16 I/O ports, P0–P15, con-
trolled through an I2C-compatible serial interface. A
17th output-only port, INT/O16, can be configured as
an interrupt output or as a general-purpose output port.
All output ports sink loads up to 50mA connected to
MAX7313’s supply voltage. The MAX7313 is rated for a
ground current of 350mA, allowing all 17 outputs to sink
20mA at the same time. Figure 1shows the output
structure of the MAX7313. The ports default to inputs on
power-up.
Port Inputs and Transition Detection

Input ports registers reflect the incoming logic levels of
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Pin Description

Figure 1. Simplified Schematic of I/O Ports
DATA FROM
SHIFT REGISTER
DATA FROM
SHIFT REGISTER
WRITE
CONFIGURATION
PULSE
WRITE PULSE
READ PULSE
CONFIGURATION
REGISTER
INPUT PORT
REGISTER
OUTPUT
PORT
REGISTER
OUTPUT PORT
REGISTER DATA
I/O PIN
GND
INPUT PORT
REGISTER DATA
TO INT
PIN
QSOPTQFN-EP
NAMEFUNCTION

122INT/O16Output Port. Open-drain output rated at 7V, 50mA. Configurable as interrupt
output or general-purpose output.
21, 2, 318, 23, 24AD0, AD1,
AD2
Address Inputs. Sets device slave address. Connect to either GND, V+,
SCL, or SDA to give 64 logic combinations. See Table 1.
4–11, 13–201–8, 10–17P0–P15Input/Output Ports. P0–P15 are open-drain I/Os rated at 5.5V, 50mA.9GNDGround. Do not sink more than 350mA into the GND pin.19SCLI2C-Compatible Serial Clock Input20SDAI2C-Compatible Serial Data I/O21V+Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic
capacitor.EP
Exposed Pad (TQFN only). Internally connected to GND. Connect to a large
analog ground plane to maximize thermal performance. Not intended to use
as an electrical connection point.
as an input or an output. Reading an input ports regis-
ter latches the current-input logic level of the affected
eight ports. Transition detection allows all ports config-
ured as inputs to be monitored for changes in their
logic status. The action of reading an input ports regis-
ter samples the corresponding 8 port bits’ input condi-
tions. This sample is continuously compared with the
actual input conditions. A detected change in input
condition causes the INT/O16 interrupt output to go
low, if configured as an interrupt output. The interrupt is
cleared either automatically if the changed input
returns to its original state, or when the appropriate
input ports register is read.
The INT/O16 pin can be configured as either an inter-
rupt output or as a 17th output port with the same static
or blink controls as the other 16 ports (Table 4).
Port Output Control and LED Blinking

The two blink phase 0 registers set the output logic lev-
els of the 16 ports P0–P15 (Table 8). These registers
control the port outputs if the blink function is disabled.
A duplicate pair of registers, the blink phase 1 regis-
ters, are also used if the blink function is enabled
(Table 9). In blink mode, the port outputs can be
flipped between using the blink phase 0 registers and
the blink phase 1 registers using software control (the
blink flip flag in the configuration register) (Table 4).
PWM Intensity Control

The MAX7313 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity con-
trol. PWM intensity control can be enabled on an out-
put-by-output basis, allowing the MAX7313 to provide
any mix of PWM LED drives and glitch-free logic out-
puts (Table 10). PWM can be disabled entirely, in
which case all output ports are static and the MAX7313
operating current is lowest because the internal oscilla-
tor is turned off.
PWM intensity control uses a 4-bit master control and 4
bits of individual control per output (Tables 13, 14). The
4-bit master control provides 16 levels of overall intensi-
ty control, which applies to all PWM-enabled output
ports. The master control sets the maximum pulse
width from 1/15 to 15/15 of the PWM time period. The
individual settings comprise a 4-bit number further
reducing the duty cycle to be from 1/16 to 15/16 of the
time window set by the master control.
For applications requiring the same PWM setting for all
output ports, a single global PWM control can be used
instead of all the individual controls to simplify the con-
trol software and provide 240 steps of intensity control
(Tables 10 and 13).
Standby Mode

When the serial interface is idle and the PWM intensity
control is unused, the MAX7313 automatically enters
standby mode. If the PWM intensity control is used, the
operating current is slightly higher because the internal
PWM oscillator is running. When the serial interface is
active, the operating current also increases because
the MAX7313, like all I2C slaves, has to monitor every
transmission.
Serial Interface
Serial Addressing

The MAX7313 operates as a slave that sends and
receives data through an I2C-compatible 2-wire inter-
face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX7313 and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX7313 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7kΩ,
is required on SDA. The MAX7313 SCL line operates
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection

SCL
SDA tF
tBUF
START
CONDITION
STOP
CONDITION
REPEATED START CONDITION START CONDITION
tSU,STO
tHD,STAtSU,STA
tHD,DAT
tSU,DAT tLOW
tHIGH
tHD,STA
MAX7313
only as an input. A pullup resistor, typically 4.7kΩ, is
required on SCL if there are multiple masters on the 2-
wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX7313
7-bit slave address plus R/Wbit, a register address
byte, one or more data bytes, and finally a STOP condi-
tion (Figure 3).
START and STOP Conditions

Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure3).
Bit Transfer

One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge

The acknowledge bit is a clocked 9th bit that the recipi-
ent uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse so the SDA line is stable low
during the high period of the clock pulse. When the
master is transmitting to the MAX7313, the device gen-
erates the acknowledge bit because the MAX7313 is
the recipient. When the MAX7313 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
Slave Address

The MAX7313 has a 7-bit long slave address (Figure6).
The eighth bit following the 7-bit slave address is the
R/Wbit. The R/Wbit is low for a write command, high
for a read command.
The slave address bits A6 through A0 are selected by
the address inputs AD0, AD1, and AD2. These pins can
be connected to GND, V+, SDA, or SCL. The MAX7313
has 64 possible slave addresses (Table 1) and, there-
fore, a maximum of 64 MAX7313 devices can be con-
trolled independently from the same interface.
Message Format for Writing the MAX7313

A write to the MAX7313 comprises the transmission of
the MAX7313’s slave address with the R/Wbit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command
byte determines which register of the MAX7313 is to be
written to by the next byte, if received (Table 2). If a
STOP condition is detected after the command byte is
received, then the MAX7313 takes no further action
beyond storing the command byte.
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection

Figure 3. START and STOP Conditions
SDA
SCL
START
CONDITION
STOP
CONDITION
Figure 4. Bit Transfer
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
Figure 5. Acknowledge
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGESTART
CONDITION
SDA BY
RECEIVER89
SDA
SCL
MSBLSB
ACKA4A1A6A3A0A2R/W
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Table 1. MAX7313 I2C Slave Address Map
DEVICE ADDRESSPIN AD2PIN AD1PIN AD0A5A4A3A2A1A0

GNDSCLGND0010000
GNDSCLV+0010001
GNDSDAGND0010010
GNDSDAV+0010011SCLGND0010100SCLV+0010101SDAGND0010110SDAV+0010111
GNDSCLSCL0011000
GNDSCLSDA0011001
GNDSDASCL0011010
GNDSDASDA0011011SCLSCL0011100SCLSDA0011101SDASCL0011110SDASDA0011111
GNDGNDGND0100000
GNDGNDV+0100001
GNDV+GND0100010
GNDV+V+0100011GNDGND0100100GNDV+0100101V+GND0100110V+V+0100111
GNDGNDSCL0101000
GNDGNDSDA0101001
GNDV+SCL0101010
GNDV+SDA0101011GNDSCL0101100GNDSDA0101101V+SCL0101110V+SDA0101111
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Table 1. MAX7313 I2C Slave Address Map (continued)
DEVICE ADDRESSPIN AD2PIN AD1PIN AD0A5A4A3A2A1A0

SCLSCLGND1010000
SCLSCLV+1010001
SCLSDAGND1010010
SCLSDAV+1010011
SDASCLGND1010100
SDASCLV+1010101
SDASDAGND1010110
SDASDAV+1010111
SCLSCLSCL1011000
SCLSCLSDA1011001
SCLSDASCL1011010
SCLSDASDA1011011
SDASCLSCL1011100
SDASCLSDA1011101
SDASDASCL1011110
SDASDASDA1011111
SCLGNDGND1100000
SCLGNDV+1100001
SCLV+GND1100010
SCLV+V+1100011
SDAGNDGND1100100
SDAGNDV+1100101
SDAV+GND1100110
SDAV+V+1100111
SCLGNDSCL1101000
SCLGNDSDA1101001
SCLV+SCL1101010
SCLV+SDA1101011
SDAGNDSCL1101100
SDAGNDSDA1101101
SDAV+SCL1101110
SDAV+SDA1101111
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register
of the MAX7313 selected by the command byte (Figure
8). If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored
in subsequent MAX7313 internal registers because the
command byte address autoincrements (Table 2). A
diagram of a write to the output ports registers (blink
phase 0 registers or blink phase 1 registers) is given in
Figure 10.
Message Format for Reading

The MAX7313 is read using the MAX7313’s internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte is read using the same rules as for a
write (Table 2). Thus, a read is initiated by first configur-
ing the MAX7313’s command byte by performing a
tive bytes from the MAX7313 with the first data byte
being read from the register addressed by the initial-
ized command byte. When performing read-after-write
verification, remember to reset the command byte’s
address because the stored command byte address
has been autoincremented after the write (Table 2). A
diagram of a read from the input ports registers is
shown in Figure 10reflecting the states of the ports.
Operation with Multiple Masters

If the MAX7313 is operated on a 2-wire interface with
multiple masters, a master reading the MAX7313 should
use a repeated start between the write, which sets the
MAX7313’s address pointer, and the read(s) that takes
the data from the location(s) (Table 2). This is because it
is possible for master 2 to take over the bus after master
1 has set up the MAX7313’s address pointer but before
master 1 has read the data. If master 2 subsequently
changes the MAX7313’s address pointer, then master
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection

Figure 8. Command and Single Data Byte ReceivedAAP0SLAVE ADDRESSCOMMAND BYTEDATA BYTE
BYTE
AUTOINCREMENT MEMORY ADDRESS
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6
ACKNOWLEDGE FROM MAX7313ACKNOWLEDGE FROM MAX7313
ACKNOWLEDGE FROM MAX7313
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX7313'S REGISTERS
R/W
Figure 9. n Data Bytes ReceivedAAP0SLAVE ADDRESSCOMMAND BYTEDATA BYTE
BYTES
AUTOINCREMENT MEMORY ADDRESS
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6
ACKNOWLEDGE FROM MAX7313ACKNOWLEDGE FROM MAX7313
ACKNOWLEDGE FROM MAX7313
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX7313'S REGISTERS
R/W
Figure 7. Command Byte ReceivedAP0SLAVE ADDRESSCOMMAND BYTE
ACKNOWLEDGE FROM MAX7313
D15D14D13D12D11D10D9D8COMMAND BYTE IS STORED ON RECEIPT OF
STOP CONDITION
ACKNOWLEDGE FROM MAX7313R/W
MAX7313
Command Address Autoincrementing

The command address stored in the MAX7313 circu-
lates around grouped register functions after each data
byte is written or read (Table 2).
Device Reset

If a device reset input is needed, consider the
MAX7314. The MAX7314 includes a RSTinput, which
clears any transaction to or from the MAX7314 on the
serial interface and configures the internal registers to
the same state as a power-up reset.
Detailed Description
Initial Power-Up

On power-up all control registers are reset and the
MAX7313 enters standby mode (Table 3). Power-up
status makes all ports into inputs and disables both the
PWM oscillator and blink functionality.
Configuration Register

The configuration register is used to configure the PWM
intensity mode, interrupt, and blink behavior, operate
the INT/O16 output, and read back the interrupt status
(Table 4).
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection

Figure 10. Read, Write, and Interrupt Timing Diagrams
SLAVE ADDRESS23456789A6A5A4A3A2A1A00A0000000
COMMAND BYTEAAP
START CONDITIONACKNOWLEDGE FROM SLAVEACKNOWLEDGE FROM SLAVEACKNOWLEDGE FROM SLAVESTOP
CONDITION
P7–P0
P15– P8
DATA1 VALID
DATA2 VALID
SLAVE ADDRESS23456789A6A5A4A3A2A1A01A
COMMAND BYTE
ANA
START CONDITIONACKNOWLEDGE FROM SLAVEACKNOWLEDGE FROM MASTER
P7–P0
P15–P8
STOP CONDITION
NO ACKNOWLEDGE FROM
MASTER
DATA2
DATA4DATA3
tDV
tDV
SLAVE ADDRESS23456789A6A5A4A3A2A1A01A
COMMAND BYTE
ANA
START CONDITIONACKNOWLEDGE FROM SLAVEACKNOWLEDGE FROM MASTER
P7–P0
P15–P8
STOP CONDITION
NO ACKNOWLEDGE FROM
MASTER
DATA1DATA2DATA3DATA4
DATA6DATA5
tDH
tDS
DATA1
tIVtIRtIRtIV
SCL
SDA
SCL
SDA
SCL
SDA
WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS)
READ FROM INPUT PORTS REGISTERS
INTERRUPT VALID/RESET

R/W
MSBLSBDATA1
MSBLSBDATA1
MSBLSBDATA2MSBLSBDATA4
MSBLSBDATA6
MSBLSBDATA2
R/W
R/W
INT
Ports Configuration
The 16 I/O ports P0 through P15 can be configured to
any combination of inputs and outputs using the ports
configuration registers (Table 5). The INT/O16 output
can also be configured as an extra general-purpose
output using the configuration register (Table 4).
Input Ports

The input ports registers are read only (Table 6). They
reflect the incoming logic levels of the ports, regardless
of whether the port is defined as an input or an output
by the ports configuration registers. Reading an input
ports register latches the current-input logic level of the
affected eight ports. A write to an input ports register is
ignored.
Transition Detection

All ports configured as inputs are always monitored for
changes in their logic status. The action of reading an
input ports register or writing to the configuration regis-
ter samples the corresponding 8 port bits’ input condi-
tion (Tables 4, 6). This sample is continuously
compared with the actual input conditions. A detected
change in input condition causes an interrupt condition.
The interrupt is cleared either automatically if the
changed input returns to its original state, or when the
compared data (Figure 10). Randomly changing a port
from an output to an input may cause a false interrupt
to occur if the state of the input does not match the
content of the appropriate input ports register. The
interrupt status is available as the interrupt flag INTin
the configuration register (Table 4).
The input status of all ports are sampled immediately
after power-up as part of the MAX7313’s internal initial-
ization, so if all the ports are pulled to valid logic levels
at that time an interrupt does not occur at power-up.
INT/O16 Output
The INT/O16 output pin can be configured as either the
INToutput that reflects the interrupt flag logic state or
as a general-purpose output O16. When used as a
general-purpose output, the INT/O16 pin has the same
blink and PWM intensity control capabilities as the
other ports.
Set the interrupt enable I bit in the configuration register
to configure INT/O16 as the INToutput (Table 4). Clear
interrupt enable to configure INT/O16 as the O16. O16
logic state is set by the 2 bits O1 and O0 in the configu-
ration register. O16 follows the rules for blinking select-
ed by the blink enable flag E in the configuration
register. If blinking is disabled, then interrupt output
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Table 2. Register Address Map
REGISTERADDRESS CODE
(HEX)
AUTOINCREMENT
ADDRESS

Read input ports P7–P00x000x01
Read input ports P15–P80x010x00
Blink phase 0 outputs P7–P00x020x03
Blink phase 0 outputs P15–P80x030x02
Ports configuration P7–P00x060x07
Ports configuration P15–P80x070x06
Blink phase 1 outputs P7–P00x0A0x0B
Blink phase 1 outputs P15–P80x0B0x0A
Master, O16 intensity0x0E0x0E (no change)
Configuration0x0F0x0F (no change)
Outputs intensity P1, P00x100x11
Outputs intensity P3, P20x110x12
Outputs intensity P5, P40x120x13
Outputs intensity P7, P60x130x14
Outputs intensity P9, P80x140x15
Outputs intensity P11, P100x150x16
Outputs intensity P13, P120x160x17
Outputs intensity P15, P140x170x10
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