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MAX7312ATGMAXIMN/a206avai2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection
MAX7312AUGMAXIMN/a13avai2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection


MAX7312ATG ,2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion ProtectionApplicationsMAX7312AUG -40°C to +125°C 24 TSSOPServers/BladesSMBus is a trademark of Intel Corp.RAI ..
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MAX7312ATG-MAX7312AUG
2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection
General Description
The MAX7312 2-wire-interfaced expander provides 16-bit
parallel input/output (I/O) port expansion in SMBus™ and
I2C™ applications. The MAX7312 consists of input port
registers, output port registers, polarity inversion regis-
ters, configuration registers, a bus timeout register, and
an I2C-compatible serial interface logic, compatible with
SMBus. The system master can invert the MAX7312 input
data by writing to the active-high polarity inversion regis-
ter. The system master can enable or disable bus timeout
by writing to the bus timeout register.
Any of the 16 I/O ports can be configured as an input or
an output. A power-on reset (POR) initializes the 16 I/Os
as inputs. Three address select pins configure the part
to one of 64 slave ID addresses.
The MAX7312 supports hot insertion. All port pins, the
INToutput, SDA, SCL, and the slave address inputs
AD0-2 remain high impedance in power-down (Vt= 0V)
up to 6V.
The MAX7312 is available in 24-pin SO, SSOP, TSSOP,
and thin QFN packages and is specified over the -40°C
to +125°C automotive temperature range.
For applications requiring I/Os with integrated 100kΩ
pullup resistors, refer to the MAX7311 data sheet.
Applications

Servers/Blades
RAID Systems
Medical Equipment
Instrumentation and Test Measurement
Networking
Features
400kbps I2C-Compatible Serial Interface2V to 5.5V Operation5V Overvoltage Tolerant I/OsSupports Hot Insertion16 I/O Pins that Default to Inputs on Power-UpOpen-Drain Interrupt Output (INT)Bus Timeout for Lock-Up-Free OperationNoise Filter on SCL/SDA Inputs64 User-Selectable Slave ID AddressesLow Standby Current (2.9µA typ)Polarity Inversion4mm ✕4mm, 0.8mm Thin QFN Package-40°C to +125°C Operation
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
Ordering Information

19-3057; Rev 0; 10/03
SMBus is a trademark of Intel Corp.
I2C Purchase of I2C components of Maxim Integrated Products,
Inc., or one of its Sublicense Associate Companies conveys a
license under the Philips I2C Patent Rights to use these compo-
nents in an I2C system provided that the system conforms to the
I2C Standard Specifications as defined by Philips.
Pin Configurations
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.+to GND................................................................-0.3V to +6V
I/O0–I/O15 as Inputs....................................(GND - 0.3V) to +6V
SCL, SDA, AD0, AD1, AD2, INT...................(GND - 0.3V) to +6V
Maximum V+Current......................................................+250mA
Maximum GND Current...................................................-250mA
DC Input Current on I/O0–I/O15.......................................±20mA
DC Output Current on I/O0–I/O15....................................±80mA
Continuous Power Dissipation (TA= +70°C)
24-Pin Wide SO (derate 11.8mW/°C above +70°C)....941mW
24-Pin SSOP (derate 8.0mW/°C above +70°C)...........640mW
24-Pin TSSOP (derate 12.2mW/°C above +70°C).......975mW
24-Pin Thin QFN (derate 20.8mW/°C above +70°C).1668mW
Operating Temperature Range.........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
Note 2:
Minimum SCL clock frequency is limited by the MAX7312 bus timeout feature, which resets the serial bus interface if either
SDA or SCL is held low for a minimum of 25ms. Disable bus timeout feature for DC operation.
Note 3:
A master device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VILof the SCL
signal) in order to bridge the undefined region SCL’s falling edge.
Note 4:
CB= total capacitance of one bus line in pF.
Note 5:
The maximum tFfor the SDA and SCL bus lines is specified at 300ns. The maximum fall time for the SDA output stage tFis
specified at 250ns. This allows series protection resistors to be connected between the SDA and SCL pins and the
SDA/SCL bus lines without exceeding the maximum specified tF.
Note 6:
Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
DC ELECTRICAL CHARACTERISTICS (continued)
AC ELECTRICAL CHARACTERISTICS
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)
MAX7312
Detailed Description

The MAX7312 general-purpose input/output (GPIO)
peripheral provides up to 16 I/O ports, controlled
through an I2C-compatible serial interface. The
MAX7312 consists of input port registers, output port
registers, polarity inversion registers, configuration reg-
isters, and a bus-timeout register. Upon power-on, all
I/O lines are set as inputs. Three slave ID address select
pins, AD0, AD1, and AD2, choose one of 64 slave ID
addresses, including the eight addresses supported by
the Phillips PCA9555. Table 1 is the register address
table. Tables 2–6 show detailed register information.
Serial Interface
Serial Addressing

The MAX7312 operates as a slave that sends and
receives data through a 2-wire interface. The interface
uses a serial data line (SDA) and a serial clock line
(SCL) to achieve bidirectional communication between
master(s) and slave(s). A master, typically a microcon-
troller, initiates all data transfers to and from the
MAX7312, and generates the SCL clock that synchro-
nizes the data transfer (Figure 2).
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection

Figure 1. MAX7312 Block Diagram
Figure 2. 2-Wire Serial Interface Timing Diagram
Each transmission consists of a START condition sent by
a master, followed by the MAX7312 7-bit slave address
plus R/Wbit, a register address byte, 1 or more data
bytes, and finally a STOP condition (Figure 3).
START and STOP Conditions

Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer

One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge

The acknowledge bit is a clocked 9th bit, which the
recipient uses as a handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX7312, the
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection

Figure 3. START and STOP Conditions
Figure 4. Bit Transfer
Figure 5. Acknowledge
MAX7312
MAX7312 generates the acknowledge bit since the
MAX7312 is the recipient. When the MAX7312 is trans-
mitting to the master, the master generates the
acknowledge bit.
Slave Address

The MAX7312 has a 7-bit-long slave address (Figure 6).
The 8th bit following the 7-bit slave address is the R/W
bit. Set this bit low for a write command and high for a
read command.
Slave address pins AD2, AD1, and AD0 choose 1 of 64
slave ID addresses (Table 7).
Data Bus Transaction

The command byte is the first byte to follow the 8-bit
device slave address during a write transmission
(Table 1, Figure 7). The command byte is used to deter-
mine which of the following registers are written or read.
Writing to Port Registers

Transmit data to the MAX7312 by sending the device
slave address and setting the LSB to a logic zero. The
command byte is sent after the address and deter-
mines which registers receive the data following the
command byte (Figure 7).
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection

Figure 6. Slave Address
Figure 7. Writes to Output Registers Through Write Byte Protocol
Eight of the MAX7312’s nine registers are configured to
operate as four register pairs: input ports, output ports,
polarity inversion ports, and configuration ports. After
sending 1 byte of data to one register, the next byte is
sent to the other register in the pair. For example, if the
first byte of data is sent to output port 2, then the next
byte of data is stored in output port 1. An unlimited
number of data bytes can be sent in one write transmis-
sion. This allows each 8-bit register to be updated inde-
pendently of the other registers.
Reading Port Registers

To read the device data, the bus master must first send
the MAX7312 address with the R/Wbit set to zero, fol-
lowed by the command byte, which determines which
register is accessed. After a restart, the bus master
must then send the MAX7312 address with the R/Wbit
set to 1. Data from the register defined by the com-
mand byte is then sent from the MAX7312 to the master
(Figures 8, 9).
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection

Figure 8. Read from Register
Figure 9. Read from Input Registers
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