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MAX7310AEEMAXIMN/a233avai2-Wire-Interfaced 8-Bit I/O Port Expander with Reset
MAX7310ATEMAXIMN/a1830avai2-Wire-Interfaced 8-Bit I/O Port Expander with Reset
MAX7310ATE+ |MAX7310ATEMAXIMN/a60avai2-Wire-Interfaced 8-Bit I/O Port Expander with Reset
MAX7310ATE+TMAXIMN/a161avai2-Wire-Interfaced 8-Bit I/O Port Expander with Reset
MAX7310ATE-T |MAX7310ATETMAXN/a175avai2-Wire-Interfaced 8-Bit I/O Port Expander with Reset
MAX7310AUEMAXIMN/a2avai2-Wire-Interfaced 8-Bit I/O Port Expander with Reset
MAX7310AUE+ |MAX7310AUEMAXIMN/a11avai2-Wire-Interfaced 8-Bit I/O Port Expander with Reset
MAX7310AUE+ |MAX7310AUEMAXN/a830avai2-Wire-Interfaced 8-Bit I/O Port Expander with Reset


MAX7310ATE ,2-Wire-Interfaced 8-Bit I/O Port Expander with ResetMAX731019-2698; Rev 3; 2/052-Wire-Interfaced 8-Bit I/O Port Expanderwith Reset
MAX7310ATE+ ,2-Wire-Interfaced 8-Bit I/O Port Expander with ResetELECTRICAL CHARACTERISTICS(V+ = 2.3V to 5.5V, GND = 0, RESET = V+, T = -40°C to +125°C, unless othe ..
MAX7310ATE+T ,2-Wire-Interfaced 8-Bit I/O Port Expander with ResetApplicationsOrdering InformationServersRAID SystemsPIN- PKGPART TEMP RANGEIndustrial ControlPACKAGE ..
MAX7310ATE-T ,2-Wire-Interfaced 8-Bit I/O Port Expander with ResetFeaturesThe MAX7310 provides 8-bit parallel input/output port♦ 400kHz 2-Wire Interface2expansion fo ..
MAX7310AUE ,2-Wire-Interfaced 8-Bit I/O Port Expander with ResetApplicationsOrdering InformationServersRAID SystemsPIN- PKGPART TEMP RANGEIndustrial ControlPACKAGE ..
MAX7310AUE+ ,2-Wire-Interfaced 8-Bit I/O Port Expander with Resetapplications. The MAX7310 consists of an input portregister, an output port register, a polarity in ..
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MAX7310AEE-MAX7310ATE-MAX7310ATE+-MAX7310ATE+T-MAX7310ATE-T-MAX7310AUE-MAX7310AUE+
2-Wire-Interfaced 8-Bit I/O Port Expander with Reset
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset

19-2698; Rev 3; 2/05
General Description

The MAX7310 provides 8-bit parallel input/output port
expansion for SMBus™-compatible and I2C-compatible
applications. The MAX7310 consists of an input port
register, an output port register, a polarity inversion reg-
ister, a configuration register, a bus timeout register,
and an SMBus/I2C-compatible serial interface. The sys-
tem master can invert the MAX7310 input data by writ-
ing to the active-high polarity inversion register. The
system master can enable or disable bus timeout by
writing to the bus timeout register.
Any of the eight I/O ports may be configured as input or
output. An active-low reset input sets the eight I/Os as
inputs. Three address select pins configure one of 56
slave ID addresses.
The MAX7310 is available in 16-pin thin QFN, TSSOP,
and QSOP packages and is specified over the -40°C to
+125°C automotive temperature range.
Applications

Servers
RAID Systems
Industrial Control
Medical Equipment
Instrumentation, Test Measurement
Features
400kHz 2-Wire Interface2.3V to 5.5V OperationLow Standby Current (1.7µA typ)Bus Timeout for Lock-Up-Free Operation56 Slave ID AddressesPolarity InversionEight I/O Pins that Default to Inputs on Power-Up5V Tolerant Open-Drain Output on I/O04mm x 4mm, 0.8mm Thin QFN Package-40°C to +125°C Operation
Ordering Information
PARTTEMP RANGEPIN-
PACKAGE
PKG
CODE

MAX7310AUE-40°C to +125°C16 TSSOP—
MAX7310AEE-40°C to +125°C16 QSOP—
MAX7310ATE-40°C to +125°C16 Thin QFNT1644-4
TOP VIEW
TSSOP/QSOP

SCL
SDA
AD0
AD1
AD2
I/O0
I/O1
GND
RESET
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
THIN QFN

I/O410934
I/O7I/O6I/O5
I/O3
I/O2
GND
I/O1
SCL
SDA
AD0AD1AD2I/O0
RESET
MAX7310ATEMAX7310
Pin Configurations

SMBus is a trademark of Intel Corp.
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V+ to GND................................................................-0.3V to +6V
I/O1–I/O7 as an Input.......................(VSS - 0.3V) to (VDD+ 0.3V)
I/O0 as an Input..............................................(VSS - 0.3V) to +6V
SCL, SDA, AD0, AD1, AD2, RESET...............(VSS - 0.3V) to +6V
DC Current on I/O0 ........................................................+400µA
DC Current on I/O1 to I/O7 .............................................±50mA
Maximum GND and V+ Current........................................180mA
Continuous Power Dissipation (TA= +70°C)
16-Pin TSSOP (derate 5.7mW/°C above +70°C).........457mW
16-Pin QSOP (derate 8.3mW/°C above +70°C)...........667mW
16-Pin Thin QFN (derate 16.9mW/°C above +70°C)...1349mW
Operating Temperature Range.........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
DC ELECTRICAL CHARACTERISTICS

(V+ = 2.3V to 5.5V, GND = 0, RESET= V+, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = 3.3V, TA= +25°C.)
(Note 1)
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITS

Supply VoltageV+2.35.5V
V+ = 2.3V1930
V+ = 3.3V2940Supply CurrentI+
All outputs floating,
all inputs at V+ or GND,
fSCL = 400kHzV+ = 5.5V6580
V+ = 2.3V1.53.4
V+ = 3.3V1.73.9Standby Current
All outputs floating,
all inputs at V+ or GND,
fSCL = 0V+ = 5.5V2.15
Power-On Reset Voltage1.62.1V
SCL, SDA

Input Voltage LowVIL0.8V
Input Voltage HighVIH2V
Low-Level Output VoltageVOILISINK = 6mA0.4V
Leakage CurrentIL-1+1µA
Input CapacitanceCI10pF
I/Os

Input Voltage LowVIL0.8V
Input Voltage HighVIH2V
Input Leakage CurrentILAll inputs at V+ or GND-1+1µA
V+ = 2.3V, VOL = 0.5V814
V+ = 3.3V, VOL = 0.5V12.522Low-Level Output CurrentIOL
V+ = 5.5V, VOL = 0.5V1930
V+ = 3.3V, VOH = 2.4V6.511High Output Current for I/O1–I/O7IOHV+ = 5.5V, VOH = 4.5V12.518mA
AD0, AD1, AD2, AND RESET

Input Voltage Low0.8V
Input Voltage High2V
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
Note 1:
All parameters are 100% production tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2:
Minimum SCL clock frequency is limited by the MAX7310 bus timeout feature, which resets the serial bus interface if either
SDA or SCL is held low for a 30ms minimum.
Note 3:
A master device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VILof the SCL signal) in
order to bridge the undefined region of SCL’s falling edge.
Note 4:
tFmeasured between 90% to 10% of V+.
Note 5:
Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
DC ELECTRICAL CHARACTERISTICS (continued)

(V+ = 2.3V to 5.5V, GND = 0, RESET= V+, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = 3.3V, TA= +25°C.)
(Note 1)
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITS

Leakage Current-1+1µA
Input Capacitance10pF
AC ELECTRICAL CHARACTERISTICS

(V+= 2.3V to 5.5V, GND = 0, RESET= V+, TA = -40°C to +125°C, unless otherwise noted.) (Note 1)
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITS

SCL Clock FrequencyfSCL(Note 2)400kHz
BUS TimeouttTIMEOUT3060ms
Bus Free Time Between STOP
and START ConditiontBUFFigure 21.3µs
Hold Time (Repeated) START
ConditiontHD, STAFigure 20.6µs
Repeated START Condition Setup
TimetSU, STAFigure 20.6µs
STOP Condition Setup TimetSU, STOFigure 20.6µs
Data Hold TimetHD, DATFigure 2 (Note 3)0.9µs
Data Setup TimetSU, DATFigure 20.1µs
SCL Low PeriodtLOWFigure 21.3µs
SCL High PeriodtHIGHFigure 20.7µs
SCL/SDA Fall Time (Transmitting)tFFigure 2 (Note 4)250ns
Pulse Width of Spike SupressedtSP(Note 5)50ns
PORT TIMING

Output Data ValidtPVFigure 91µs
Input Data Setup TimetPSFigure 1029µs
Input Data Hold TimetPHFigure 100µs
RESET

Reset Pulse Width100ns
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
I/O1–I/O7 OUTPUT SOURCE CURRENT
vs. TEMPERATURE
MAX7310 toc06
TEMPERATURE (°C)
SOURCE CURRENT (mA)
V+ = 2.3V,
VOH = 1.4V
I/O0–I/O7 OUTPUT SINK CURRENT
vs. SUPPLY VOLTAGE
MAX7310 toc05
SUPPLY VOLTAGE (V)
SINK CURRENT (mA)
VOL = 0.5V
I/O0–I/O7 OUTPUT SINK CURRENT
vs. TEMPERATURE
MAX7310 toc04
TEMPERATURE (°C)
SINK CURRENT (mA)
VOL = 0.5V
VCC = 3.3V
VCC = 2.3V
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX7310 toc03
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
fSCL = 440kHz,
NO LOAD ON I/O0–I/O7
STANDBY SUPPLY CURRENT
vs. TEMPERATURE
MAX7310 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (
V+ = 3.3V, fSCL = 0,
NO LOAD ON I/O0–I/O7
SUPPLY CURRENT
vs. TEMPERATURE
MAX7310 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (
V+ = 3.3V, fSCL = 440kHz,
NO LOAD ON I/O0–I/O7
Detailed Description
The MAX7310 general-purpose input/output (GPIO)
peripheral provides up to eight I/O ports, controlled
through an I2C-compatible serial interface. The
MAX7310 consists of an input port register, an output
port register, a polarity inversion register, a configura-
tion register, and a bus timeout register. An active-low
reset input sets the eight I/O lines as inputs. Three
slave ID address select pins (AD0, AD1, and AD2)
choose one of 56 slave ID addresses (Figure 1).
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
Pin Description
PIN
TSSOP/
QSOP
THIN
QFNNAMEFUNCTION
15SCLSerial Clock Line16SDASerial Data Line1AD0Address Input 02AD1Address Input 13AD2Address Input 24I/O0Input/Output Port 0 (Open Drain)5I/O1Input/Output Port 16GNDSupply Ground
9–147–12I/O2–I/O7Input/Output Port 2—Input/Output Port 713RESETExternal Reset (Active Low). Pull RESET low to configure I/O pins as inputs. Set RESET
high for normal operation.14V+Supply Voltage. Bypass with a 0.047µF capacitor to GND.PADExposed
padExposed Pad on Package Underside. Connect to GND.
Figure 1. MAX7310 Block Diagram
AD0
AD1
AD2
SCL
SDA
SMBus
CONTROLINPUT
FILTER
POWER-ON
RESETRESET
GND
INPUT/
OUTPUT
PORTS
WRITE PULSE
READ PULSE
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
8 BIT
MAX7310
MAX7310
Table 1 is the register address table. Tables 2–6 list
register 0 through register 4 information.
Serial Interface
Serial Addressing

The MAX7310 operates as a slave that sends and
receives data through a 2-wire interface. The interface
uses a serial data line (SDA) and a serial clock line
(SCL) to achieve bidirectional communication between
master(s) and slave(s). A master, typically a microcon-
troller, initiates all data transfers to and from the
MAX7310, and generates the SCL clock that synchro-
nizes the data transfer (Figure 2).
Each transmission consists of a start condition sent by
a master, followed by the MAX7310 7-bit slave address
plus an R/Wbit, a register address byte, one or more
data bytes, and finally a stop condition (Figure 3).
Start and Stop Conditions

Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a start (S) condition by transitioning SDA from
high to low while SCL is high. When the master has fin-
ished communicating with the slave, it issues a stop (P)
condition by transitioning SDA from low to high while
SCL is high. The bus is then free for another transmis-
sion (Figure 3).
Bit Transfer

One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge

The acknowledge bit is a clocked 9th bit, which the
recipient uses as a handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX7310, the
MAX7310 generates the acknowledge bit since the
MAX7310 is the recipient. When the MAX7310 is trans-
mitting to the master, the master generates the
acknowledge bit.
Slave Address

The MAX7310 has a 7-bit-long slave address (Figure
6). The 8th bit following the 7-bit slave address is the
R/Wbit. Set this bit low for a write command and high
for a read command.
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset

Figure 2. 2-Wire Serial Interface Timing Diagrams
SCL
SDA
START CONDITIONSTOP CONDITIONREPEATED START CONDITIONSTART CONDITION
tSU, DAT
tHD, DATtLOW
tHD, STA
tHIGHtF
tSU, STA
tHD, STA
tSU, STO
tBUF
SDA
SCLS
START
CONDITION
STOP
CONDITION
The first bits (MSBs) of the MAX7310 slave address are
always zero. Slave address bits AD2, AD1, and AD0
choose 1 of 56 slave ID addresses (Table 7).
Registers

The register address byte is the first byte to follow the
address byte during a read/write transmission. The reg-
ister address byte acts as a pointer to determine which
register is written or read.
The input port register is a read-only port. It reflects the
incoming logic levels of the I/O ports, regardless of
whether the pin is defined as an input or an output by
the configuration register. Writes to the input port regis-
ter are ignored.
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset

SDA
SCL
DATA LINE STABLE; DATA VALIDCHANGE OF DATA ALLOWED
Figure 4. Bit Transfer
Figure 6. Slave Address
SCL
SDA0A2A1A0ACK
MSBLSB
FIXEDPROGRAMMABLEA4A3R/W
SCL
SDA
BY TRANSMITTER
CLOCK PULSE FOR ACKNOWLEDGMENTSTART CONDITION
SDA
BY RECEIVER89
Figure 5. Acknowledge
MAX7310
The output port register sets the outgoing logic levels of
the I/O ports, defined as outputs by the configuration
register. Reads from the output port register reflect the
value that is in the flip-flop controlling the output selec-
tion, not the actual I/O value, which may differ if the out-
put is overloaded.
The polarity inversion register enables polarity inversion
of ports defined as inputs by the configuration register.
Set the bit in the polarity inversion register (write with a
1) to invert the corresponding port pin’s polarity. Clear
the bit in the polarity inversion register (write with a
zero) to retain the corresponding port pin’s original
polarity.
The configuration register configures the directions of
the ports. Set the bit in the configuration register to
enable the corresponding port pin as an input with a
high-impedance output driver. Clear the bit in the con-
figuration register to enable the corresponding port pin
as an output.
Set bit T0 to enable the bus timeout function and low to
disable the bus timeout function. Enabling the timeout
feature resets the serial bus interface when SCL stops
either high or low during a read or write access to the
MAX7310. If either SCL or SDA is low for more than
30ms min and 60ms max after the start of a valid serial
transfer, the interface resets itself. Resetting the serial
bus interface sets up SDA as an input. The MAX7310
then waits for another start condition.
Standby

The MAX7310 goes into standby when all pins are set
to V+ or GND. Standby supply current is typically
1.7µA.
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
Table 3. Register 1—Output Port Register
BITO7O6O5O4O3O2O1O0

Default00000000
Table 4. Register 2—Polarity Inversion Register
BITI/O7I/O6I/O5I/O4I/O3I/O2I/O1I/O0

Default11110000
Table 5. Register 3—Configuration Register
BITI/O7I/O6I/O5I/O4I/O3I/O2I/O1I/O0

Default11111111
Table 6. Register 4—Timeout Register
BITT7T6T5T4T3T2T1T0

Defaultxxxxxxx1
Table 1. Register Address
REGISTER
ADDRESS
(hex)
FUNCTIONPROTOCOL

0x00Input port registerRead byte.
0x01Output port registerRead/write byte.
0x02Polarity inversion
registerRead/write byte.
0x03Configuration
registerRead/write byte.
0x04Timeout registerRead/write byte.
0xFFReserved register
Factory reserved.
Do not write to this
register.
Table 2. Register 0—Input Port Register
BITI7I6I5I4I3I2I1I0
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