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MAX5940AESAMAXIM ?N/a5avaiIEEE 802.3af PD Interface Controller For Power-Over-Ethernet
MAX5940AESAMAXN/a350avaiIEEE 802.3af PD Interface Controller For Power-Over-Ethernet
MAX5940AESAMAXIMN/a364avaiIEEE 802.3af PD Interface Controller For Power-Over-Ethernet
MAX5940BESAMAXIM ?N/a26avaiIEEE 802.3af PD Interface Controller For Power-Over-Ethernet
MAX5940BESAMAXIMN/a39avaiIEEE 802.3af PD Interface Controller For Power-Over-Ethernet
MAX5940BESAMAXN/a875avaiIEEE 802.3af PD Interface Controller For Power-Over-Ethernet


MAX5940BESA ,IEEE 802.3af PD Interface Controller For Power-Over-EthernetApplicationsIP Phones Security CamerasPin Configurations appear at end of data sheet.Wireless Acces ..
MAX5940BESA ,IEEE 802.3af PD Interface Controller For Power-Over-EthernetMAX5940A/MAX5940B19-2991; Rev 0; 10/03IEEE 802.3af PD Interface Controller For Power-Over-Ethernet
MAX5940BESA ,IEEE 802.3af PD Interface Controller For Power-Over-Ethernetfeatures power-mode UVLO with wide hysteresis and(MAX5940B Only)long deglitch time to compensate fo ..
MAX5940BESA+ ,IEEE 802.3af PD Interface Controller for Power-Over-Ethernetfeatures power-mode UVLO with wide hysteresis and long deglitch time♦ Wide UVLO Hysteresis Accommod ..
MAX5940CESA+ ,IEEE 802.3af PD Interface Controller for Power-Over-EthernetFeaturesThe MAX5940A/MAX5940B/MAX5940C/MAX5940D pro- ♦ Fully Integrated IEEE 802.3af-Compliant PDvi ..
MAX5940DESA+T ,IEEE 802.3af PD Interface Controller for Power-Over-EthernetELECTRICAL CHARACTERISTICS(V = (GND - V ) = 48V, GATE = PGOOD = PGOOD = OUT = OPEN, UVLO = V , T = ..
MAZ8120-M ,Silicon planar typeAbsolute Maximum Ratings T = 25°CaMarking SymbolParameter Symbol Rating UnitRefer to the list of t ..
MAZ8130-H ,Silicon planar typeZener DiodesMAZ8000 SeriesSilicon planar typeUnit : mmFor stabilization of power supplyKA
MAZ8130L ,Silicon planar typeZener DiodesMAZ8000 SeriesSilicon planar typeUnit : mmFor stabilization of power supplyKA
MAZ8130-L ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8130-M ,Silicon planar typeElectrical characteristics within part numbers T = 25°CaTemperaturecoefficient ofZener voltage Rev ..
MAZ8150G ,Silicon planar typeFeatures Package Extremely low noise voltage caused from the diode (2.4 V to Code 39V, 1/3 to 1 ..


MAX5940AESA-MAX5940BESA
IEEE 802.3af PD Interface Controller For Power-Over-Ethernet
General Description
The MAX5940A/MAX5940B provide complete interface
function for a powered device (PD) to comply with the
IEEE 802.3af standard in a power-over-ethernet system.
MAX5940A/MAX5940B provide the PD with a detection
signature, a classification signature, and an integrated
isolation switch with programmable inrush current con-
trol. These devices also feature power-mode undervolt-
age lockout (UVLO) with wide hysteresis, and
power-good outputs.
An integrated MOSFET provides PD isolation during
detection and classification. The MAX5940A/MAX5940B
guarantee a leakage current offset of less than 10µA dur-
ing the detection phase. A programmable current limit
prevents high inrush current during power-on. The device
features power-mode UVLO with wide hysteresis and
long deglitch time to compensate for twisted-pair cable
resistive drop and to assure glitch-free transition between
detection, classification, and power-on/-off phases.
The MAX5940A provides an active-high (PGOOD) open-
drain output and a fixed UVLO threshold. The MAX5940B
provides both active-high (PGOOD) and active-low
(PGOOD)outputs and has an adjustable UVLO threshold
with the default value compliant to the 802.3af standard.
The MAX5940A/MAX5940B are designed to work with or
without an external diode bridge.
The MAX5940A/MAX5940B are available in 8-pin SO
packages and are rated over the extended temperature
range of -40°C to +85°C.
Applications

IP PhonesSecurity Cameras
Wireless Access NodesIEEE 802.3af Power Devices
Computer Telephony
Features
Fully Integrated IEEE 802.3af-Compliant PD
Interface
PD Detection and Programmable Classification
Signatures
Less than 10µA Leakage Current Offset During
Detection
Integrated MOSFET For Isolation and Inrush
Current Limiting
Gate Output Allows External Control of the
Internal Isolation MOSFET
Programmable Inrush Current ControlProgrammable Undervoltage Lockout
(MAX5940B Only)
Wide UVLO Hysteresis Accommodates Twisted-
Pair Cable Voltage Drop
PGOOD/PGOODOutputs to Enable Downstream
DC-DC Converters
-40°C to +85°C Operating Temperature Range
MAX5940A/MAX5940B
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
Ordering Informationypical Operating Circuits

19-2991; Rev 0; 10/03
Pin Configurations appear at end of data sheet.
MAX5940A/MAX5940B
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VIN= (GND - VEE) = 48V, GATE = PGOOD= PGOOD = OUT = OPEN, UVLO = VEE, TA= -40°C to +85°C, unless otherwise noted.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages are referenced to VEE, unless otherwise noted.)
GND........................................................................-0.3V to +80V
OUT, PGOOD...........................................-0.3V to (GND + 0.3V)
RCLASS, GATE......................................................-0.3V to +12V
UVLO........................................................................-0.3V to +8V
PGOOD to OUT.........................................-0.3V to (GND + 0.3V)
Maximum Input/Output Current (continuous)
OUT to VEE...................................................................500mA
GND, RCLASS to VEE.....................................................70mA
UVLO, PGOOD, PGOOD to VEE.....................................20mA
GATE to VEE....................................................................80mA
Continuous Power Dissipation (TA= +70°C)
8-Pin SO (derate 5.9mW/°C above +70°C)..................470mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) ................................+300°C
MAX5940A/MAX5940B
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
Note 2:
The input offset current is illustrated in Figure 1.
Note 3:
Effective differential input resistance is defined as the differential resistance between GND and VEEwithout any external
resistance. See Figure 1.
Note 4:
Classification current is turned off whenever the IC is in power mode.
Note 5:
See Table2 in the PD Classification Modesection. RDISCand RCLmust be ±1%, 100ppm or better. ICLASSincludes the IC
bias current and the current drawn by RDISC.
Note 6:
See the Thermal Dissipation sectionfor details.
Note 7:
When UVLO is connected to the midpoint of an external resistor-divider with a series resistance of 25.5kΩ(±1%), the turn-
on threshold set-point for the power mode is defined by the external resistor-divider. Make sure the voltage on the UVLO
pin does not exceed its maximum rating of 8V when VINis at the maximum voltage (MAX5940B only).
Note 8:
When the UVLO input voltage is below VTH,G,UVLO,the MAX5940B sets the UVLO threshold internally.
Note 9:
An input voltage or VUVLOglitch below their respective thresholds shorter than or equal to tOFF_DLYdoes not cause the
MAX5940A/MAX5940B to exit power-on mode (as long as the input voltage remains above an operable voltage level of 12V).
Note 10:
Guaranteed by design.
Note 11:
PGOOD references to OUT while PGOODreferences to VEE.
ELECTRICAL CHARACTERISTICS (continued)

(VIN= (GND - VEE) = 48V, GATE = PGOOD= PGOOD = OUT = OPEN, UVLO = VEE, TA= -40°C to +85°C, unless otherwise noted.
MAX5940A/MAX5940B
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
Typical Operating Characteristics

(VIN= (GND - VEE) = 48V, GATE = PGOOD= PGOOD = OUT = OPEN, UVLO = VEE(MAX5940B), TA= -40°C to +85°C. Typical values
are at TA= +25°C. All voltages are referenced to VEE, unless otherwise noted.)
MAX5940A/MAX5940B
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
OUT LEAKAGE CURRENT
vs. TEMPERATURE

MAX5940A/B toc08
TEMPERATURE (°C)
OUT LEAKAGE CURRENT (nA)3510-15
INRUSH CURRENT CONTROL (VIN = 12V)
MAX5940A/B toc09
1ms/div
VGATE
5V/div
IINRUSH
100mA/div
VOUT TO VEE
10V/div
PGOOD
10V/div
INRUSH CURRENT CONTROL (VIN = 48V)

MAX5940A/B toc10
2ms/div
VGATE
5V/div
IINRUSH
100mA/div
VOUT TO VEE
50V/div
PGOOD
50V/div
INRUSH CURRENT CONTROL (VIN = 67V)

MAX5940A/B toc11
2ms/div
VGATE
5V/div
IINRUSH
100mA/div
VOUT TO VEE
50V/div
PGOOD
50V/divypical Operating Characteristics (continued)
(VIN= (GND - VEE) = 48V, GATE = PGOOD= PGOOD = OUT = OPEN, UVLO = VEE(MAX5940B), TA= -40°C to +85°C. Typical values
are at TA= +25°C. All voltages are referenced to VEE, unless otherwise noted.)
MAX5940A/MAX5940B
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
Pin Description
Detailed Description
Operating Modes

The PD front-end section of the MAX5940A/MAX5940B
operates in 3 different modes, PD detection signature,
PD classification, and PD power, depending on its input
voltage (VIN= GND - VEE). All voltage thresholds are
designed to operate with or without the optional diode
bridge while still complying with the IEEE 802.3af stan-
dard (see Figure 4).
Detection Mode (1.4V ≤VIN
10.1V)
In detection mode, the power source equipment (PSE)
applies two voltages on VINin the range of 1.4V to
10.1V (1V step minimum), and then records the current
measurements at the two points. The PSE then com-
putes ∆V/∆I to ensure the presence of the 25.5kΩsig-
nature resistor. In this mode, most of the MAX5940A/
MAX5940B internal circuitry is off and the offset current
is less than 10µA.
If the voltage applied to the PD is reversed, install pro-
tection diodes on the input terminal to prevent internal
damage to the MAX5940A/MAX5940B (see the Typical
Application Circuits). Since the PSE uses a slope tech-
nique (∆V/∆I) to calculate the signature resistance, the
DC offset due to the protection diodes is subtracted
and does not affect the detection process.
Classification Mode (12.6V ≤VIN
20V)
In the classification mode, the PSE classifies the PD
based on the power consumption required by the PD.
This allows the PSE to efficiently manage power distrib-
ution. The IEEE 802.3af standard defines five different
classes as shown in Table1. An external resistor (RCL)
connected from RCLASS to VEEsets the classification
current.
The PSE determines the class of a PD by applying a volt-
age at the PD input and measures the current sourced
out of the PSE. When the PSE applies a voltage between
12.6V and 20V, the MAX5940A/MAX5940B exhibit a cur-
rent characteristic with values indicated in Table 2. The
PSE uses the classification current information to classify
the power requirement of the PD. The classification cur-
rent includes the current drawn by the 25.5kΩdetection
signature resistor and the supply current of the
MAX5940A/MAX5940B so the total current drawn by the
PD is within the IEEE 802.3af standard figures. The classi-
fication current is turned off whenever the device is in
power mode.
Power Mode

During power mode, when VINrises above the undervolt-
age lockout threshold (VUVLO,ON), the MAX5940A/
MAX5940B gradually turn on the internal N-channel MOS-
FET Q1 (see Figure 2). The MAX5940A/MAX5940B
charge the gate of Q1 with a constant current source
(10µA, typ). The drain-to-gate capacitance of Q1 limits
the voltage rise rate at the drain of the MOSFET,thereby
limiting the inrush current. To reduce the inrush current,
add external drain-to-gate capacitance (see the Inrush
Currentsection). When the drain of Q1 is within 1.2V of
its source voltage and its gate-to-source voltage is
above 5V, the MAX5940A/MAX5940B asserts the
PGOOD/PGOODoutputs. The MAX5940A/MAX5940B
have a wide UVLO hysteresis and turn-off deglitch time
to compensate for the high impedance of the twisted-
pair cable.
Undervoltage Lockout

The MAX5940A/MAX5940B operate up to a 67V supply
voltage with a default UVLO turn-on (VUVLO,ON) set at
35V (MAX5940A) or 39V (MAX5940B) and a UVLO turn-
off (VUVLO,OFF) set at 30V. The MAX5940B has an
adjustable UVLO threshold using a resistor-divider con-
nected to UVLO (see Figure 3). When the input voltage
is above the UVLO threshold, the IC is in power mode
and the MOSFET is on. When the input voltage goes
below the UVLO threshold for more than tOFF_DLY, the
MOSFET turns off.
MAX5940A/MAX5940B
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
MAX5940A/MAX5940B
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
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