MAX5884EGM ,3.3V, 14-Bit, 200Msps High Dynamic Performance DAC with CMOS InputsApplications1 36N.C. B10Base Stations: Single-/Multicarrier UMTS, N.C. 2 35 B11CDMA, GSM XOR 3 34 B ..
MAX5884EGM+D ,3.3V, 14-Bit, 200Msps High Dynamic Performance DAC with CMOS InputsApplications1 36N.C. B10Base Stations: Single-/Multicarrier UMTS, N.C. 2 35 B11CDMA, GSM XOR 3 34 B ..
MAX5885EGM+D ,3.3V, 16-Bit, 200Msps High Dynamic Performance DAC with CMOS InputsApplications1 36B1 B12Base Stations: Single/Multicarrier UMTS, 2 35B0 B13CDMA, GSM XOR 3 34 B14Comm ..
MAX5886EGK ,3.3V, 12-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS InputsApplicationsEPN.C. 1 51 B7NBase Stations: Single/Multicarrier UMTS, N.C. 2 50 B7PN.C. 3 49 B8NCDMA, ..
MAX5886EGK+D ,3.3V, 12-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS InputsApplicationsEPN.C. 1 51 B7NBase Stations: Single/Multicarrier UMTS, N.C. 2 50 B7PN.C. 3 49 B8NCDMA, ..
MAX5887EGK ,3.3V, 14-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS InputsApplicationsEPBase Stations: Single/Multicarrier UMTS, B1P 1 51 B9NB1N 2 50 B9PCDMA, GSM B0P 3 49 B ..
MAZ8051-H ,Silicon planar typeElectrical characteristics within part numbers T = 25°CaTemperaturecoefficient ofZener voltage Rev ..
MAZ8051-L ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8051M ,Silicon planar typeZener DiodesMAZ8000 SeriesSilicon planar typeUnit : mmFor stabilization of power supplyKA
MAZ8051-M ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8056-H ,Silicon planar typeAbsolute Maximum Ratings T = 25°CaMarking SymbolParameter Symbol Rating UnitRefer to the list of t ..
MAZ8056-L ,Silicon planar typeElectrical characteristics within part numbers T = 25°CaTemperaturecoefficient ofZener voltage Rev ..
MAX5884EGM
3.3V, 14-Bit, 200Msps High Dynamic Performance DAC with CMOS Inputs
General DescriptionThe MAX5884 is an advanced, 14-bit, 200Msps digital-
to-analog converter (DAC) designed to meet the
demanding performance requirements of signal synthe-
sis applications found in wireless base stations and
other communications applications. Operating from a
single 3.3V supply, this DAC offers exceptional dyna-
mic performance such as 77dBc spurious-free dynamic
range (SFDR) at fOUT= 10MHz. The DAC supports
update rates of 200Msps at a power dissipation of less
than 200mW.
The MAX5884 utilizes a current-steering architecture,
which supports a full-scale output current range of 2mA
to 20mA, and allows a differential output voltage swing
between 0.1VP-Pand 1VP-P.
The MAX5884 features an integrated 1.2V bandgap
reference and control amplifier to ensure high accuracy
and low noise performance. Additionally, a separate
reference input pin enables the user to apply an exter-
nal reference source for optimum flexibility and to
improve gain accuracy.
The digital and clock inputs of the MAX5884 are
designed for CMOS-compatible voltage levels. The
MAX5884 is available in a 48-pin QFN package with an
exposed paddle (EP) and is specified for the extended
industrial temperature range (-40°C to +85°C).
Refer to the MAX5883 and MAX5885 data sheets for
pin-compatible 12- and 16-bit versions of the MAX5884.
For LVDS high-speed versions, refer to the MAX5886,
MAX5887, and MAX5888 data sheets.
ApplicationsBase Stations: Single-/Multicarrier UMTS,
CDMA, GSM
Communications: LMDS, MMDS, Point-to-Point
Microwave
Digital Signal Synthesis
Automated Test Equipment (ATE)
Instrumentation
Features200Msps Output Update RateSingle 3.3V Supply OperationExcellent SFDR and IMD Performance
SFDR = 77dBc at fOUT= 10MHz (to Nyquist)
IMD = -86dBc at fOUT= 10MHz
ACLR = 72dB at fOUT= 30.72MHz2mA to 20mA Full-Scale Output CurrentCMOS-Compatible Digital and Clock InputsOn-Chip 1.2V Bandgap ReferenceLow Power Dissipation48-Pin QFN-EP Package
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
Ordering Information19-2825; Rev 1; 12/03
Pin Configuration*EP = Exposed paddle.
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(AVDD= DVDD= VCLK = 3.3V, AGND = DGND = CLKGND = 0V, external reference, VREFIO= 1.25V, RL= 50Ω, IOUT= 20mA,
fCLK= 200Msps, TA= TMINto TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design
and characterization. Typical values are at TA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDD, DVDD, VCLK to AGND................................-0.3V to +3.9V
AVDD, DVDD, VCLK to DGND...............................-0.3V to +3.9V
AVDD, DVDD, VCLK to CLKGND...........................-0.3V to +3.9V
AGND, CLKGND to DGND....................................-0.3V to +0.3V
DACREF, REFIO, FSADJ to AGND.............-0.3V to AVDD+ 0.3V
IOUTP, IOUTN to AGND................................-1V to AVDD+ 0.3V
CLKP, CLKN to CLKGND...........................-0.3V to VCLK + 0.3V
B0–B13, SEL0, PD, XOR to DGND.............-0.3V to DVDD+ 0.3V
Continuous Power Dissipation (TA= +70°C)
48-Pin QFN (derate 27mW/°C above +70°C)............2162.2mW
Thermal Resistance (θJA)..............................................+37°C/W
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
ELECTRICAL CHARACTERISTICS (continued)(AVDD= DVDD= VCLK = 3.3V, AGND = DGND = CLKGND = 0V, external reference, VREFIO= 1.25V, RL= 50Ω, IOUT= 20mA,
fCLK= 200Msps, TA= TMINto TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design
and characterization. Typical values are at TA= +25°C.)
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
Note 1:Nominal full-scale current IOUT= 32 ✕IREF.
Note 2:This parameter does not include update-rate depending effects of sin(x)/x filtering inherent in the MAX5884.
Note 3:Parameter measured single ended into a 50Ωtermination resistor.
Note 4:Parameter guaranteed by design.
Note 5:Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.
ELECTRICAL CHARACTERISTICS (continued)(AVDD= DVDD= VCLK = 3.3V, AGND = DGND = CLKGND = 0V, external reference, VREFIO= 1.25V, RL= 50Ω, IOUT= 20mA,
fCLK= 200Msps, TA= TMINto TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
Typical Operating Characteristics(AVDD= DVDD= VCLK = 3.3V, external reference, VREFIO= 1.25V, RL= 50Ω, IOUT= 20mA, TA= +25°C, unless otherwise noted.)
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
Typical Operating Characteristics (continued)(AVDD= DVDD= VCLK = 3.3V, external reference, VREFIO= 1.25V, RL= 50Ω, IOUT= 20mA, TA= +25°C, unless otherwise noted.)
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
Pin Description
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS InputsFigure 1. Simplified MAX5884 Block Diagram
MAX5884
3.3V, 14-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
Detailed Description
ArchitectureThe MAX5884 is a high-performance, 14-bit, current-
steering DAC (Figure 1) capable of operating with
clock speeds up to 200MHz. The converter consists of
separate input and DAC registers, followed by a cur-
rent-steering circuit. This circuit is capable of generat-
ing differential full-scale currents in the range of 2mA to
20mA. An internal current-switching network in combi-
nation with external 50Ωtermination resistors convert
the differential output currents into a differential output
voltage with a peak-to-peak output voltage range of
0.1V to 1V. An integrated 1.2V bandgap reference,
control amplifier, and user-selectable external resistor
determine the data converter’s full-scale output range.
Reference Architecture and OperationThe MAX5884 supports operation with the on-chip 1.2V
bandgap reference or an external reference voltage
source. REFIO serves as the input for an external, low-
impedance reference source, and as the output if the
DAC is operating with the internal reference. For stable
operation with the internal reference, REFIO should be
decoupled to AGND with a 0.1µF capacitor. Due to its
limited output drive capability, REFIO must be buffered
with an external amplifier, if heavier loading is required.
The MAX5884’s reference circuit (Figure 2) employs a
control amplifier, designed to regulate the full-scale
current IOUTfor the differential current outputs of the
DAC. Configured as a voltage-to-current amplifier, the
output current can be calculated as follows:
IOUT= 32 ✕IREFIO- 1 LSB
IOUT= 32 ✕IREFIO- (IOUT/ 214)
where IREFIOis the reference output current (IREFIO=
VREFIO/RSET) and IOUTis the full-scale output current
of the DAC. Located between FSADJ and DACREF,
RSETis the reference resistor, which determines the
amplifier’s output current for the DAC. See Table 1 for a
matrix of different IOUTand RSETselections.
Analog Outputs (IOUTP, IOUTN)The MAX5884 outputs two complementary currents
(IOUTP, IOUTN) that can be operated in a single-
ended or differential configuration. A load resistor can
convert these two output currents into complementary
single-ended output voltages. The differential voltage
existing between IOUTP and IOUTN can also be con-
verted to a single-ended voltage using a transformer or
a differential amplifier configuration. If no transformer is
used, the output should have a 50Ωtermination to the
analog ground and a 50Ωresistor between the outputs.
