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MAX5402EUAMAXN/a3000avai256-Tap, レPoT, Low-Drift, Digital Potentiometer


MAX5402EUA ,256-Tap, レPoT, Low-Drift, Digital PotentiometerELECTRICAL CHARACTERISTICS(V = +5V, V = V , V = 0, T = T to T . Typical values are at V = +5V, T = ..
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MAX5402EUA
256-Tap, レPoT, Low-Drift, Digital Potentiometer
General Description
The MAX5402 µPoT™digital potentiometer is a 256-tap
variable resistor with 10kΩtotal resistance in a tiny 8-
pin µMAX package. This device functions as a mechan-
ical potentiometer, consisting of a fixed resistor string
with a digitally controlled wiper contact. It operates
from +2.7V to +5.5V single-supply voltages and uses
an ultra-low 0.1µA supply current. This device also pro-
vides glitchless switching between resistor taps, as well
as a convenient power-on reset (POR) that sets the
wiper to the midscale position at power-up. A low
5ppm/°C ratiometric temperature coefficient makes it
ideal for applications requiring low drift.
The MAX5402 serves well in applications requiring digi-
tally controlled resistors, including adjustable voltage
references and programmable gain amplifiers (PGAs).
A nominal end-to-end resistor temperature coefficient of
35ppm/°C makes this part suitable for use as a variable
resistor in applications such as low-tempco adjustable
gain and other circuit configurations. This device is
guaranteed over the extended industrial temperature
range (-40°C to +85°C).
________________________Applications

Mechanical Potentiometer Replacement
Low-Drift PGAs
Adjustable Voltage References
Features
Small Footprint, 8-Pin µMAX PackageUltra-Low 100nA Supply Current+2.7V to +5.5V Single-Supply Operation 256 Tap PositionsLow Ratiometric Temperature Coefficient
5ppm/°C
Low End-to-End Resistor Temperature Coefficient
35ppm/°C
Power-On Reset: Wiper Goes to Midscale
(Position 128)
Glitchless Switching Between the Resistor Taps3-Wire SPI™-Interface Compatible10kΩResistor Value
MAX5402
256-Tap, µPoT, Low-Drift,
Digital Potentiometer
Pin Configuration

19-1896; Rev 0; 1/01
Ordering Information

µPoT is a trademark of Maxim Integrated Products.
SPI is a trademark of Motorola, Inc.
Functional Diagram
MAX5402
256-Tap, µPoT, Low-Drift,
Digital Potentiometer
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= +5V, VH= VDD, VL = 0, TA= TMINto TMAX. Typical values are at VDD= +5V, TA= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
DIN, SCLK, CSto GND............................................-0.3V to +6V
H, L, W to GND.............................................-0.3V to (VDD+ 0.3)
Maximum Continuous Current into Pins H, L, and W ...........1mA
Continuous Power Dissipation (TA= +70°C)
8-Pin µMAX (derate 4.1mW/°C above +70°C)............330mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX5402
256-Tap, µPoT, Low-Drift,
Digital Potentiometer
Note 1:
Linearity is defined in terms of the H-to-L code-dependent resistance.
Note 2:
The DNL and INL are measured with the potentiometer configured as a voltage-divider with H = VDDand L = 0. The wiper
terminal is unloaded and measured with an ideal voltmeter.
Note 3:
The DNL and INL are measured with the potentiometer configured as a variable resistor. H is unconnected and L = 0. The
wiper terminal is driven with a source current of 200µA at VDD= +3V and 400µA at VDD= +5V.
Note 4:
The wiper resistance is the worst value measured, injecting a current, IW= VDD/RHLinto terminal W.
Note 5:
Digital timing is guaranteed by design.
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +5V, VH= VDD, VL = 0, TA= TMINto TMAX. Typical values are at VDD= +5V, TA= +25°C, unless otherwise noted.)
MAX5402
256-Tap, µPoT, Low-Drift,
Digital Potentiometer
Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
ypical Operating Characteristics (continued)(TA = +25°C, unless otherwise noted.)
MAX5402
256-Tap, µPoT, Low-Drift,
Digital Potentiometer

VOLTAGE-DIVIDER INL vs. INPUT CODE
MAX5402 Toc07
INPUT CODE (DECIMAL)
INL (LSB)
SUPPLY CURRENT vs. TEMPERATURE
MAX5402 Toc08
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
MAX5402
256-Tap, µPoT, Low-Drift,
Digital Potentiometer
Detailed Description

The MAX5402 consists of 255 fixed resistors in series
between pins H and L. The potentiometer wiper (pin W)
can be programmed to access any one of the 256 dif-
ferent tap points on the resistor string. The MAX5402
has an SPI-compatible 3-wire serial data interface to
control the wiper tap position. This write-only interface
contains three inputs: Chip Select (CS), Data In (DIN),
and Data Clock (SCLK). When CSis taken low, data
from the DIN pin is synchronously loaded into the 8-bit
serial shift register on the rising edge of each SCLK
pulse (Figure 1). The MSB is shifted in first, as shown in
Figure 3. Note that if CSis not kept low during the entire
data stream, the data will be corrupted and the device
will need to be reloaded. After all 8 data bits have been
loaded into the shift register, they are latched into the
decoder once CSis taken high. The decoder switches
the potentiometer wiper to the tap position that corre-
sponds to the 8-bit input data. Each resistor cell is
10kΩ/255 or 39.2Ωfor the MAX5402.
The MAX5402 features POR circuitry. This sets the
wiper to the midscale position at power-up by loading a
binary value of 128 into the 8-bit latch. The MAX5402
can be used as a variable resistor by connecting pin W
to either pin H or L.
Figure 1. Serial Interface Timing Diagram
Figure 2. Detailed Serial Interface Timing Diagram
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