MAX1609EEE ,Octal SMBus-to-Parallel I/O ExpandersApplicationsParallel I/O ExpansionPower-Plane SwitchingNotebook and Desktop Computers Typical Opera ..
MAX160CPN ,レP Compatible 8 Bit A/D Converter
MAX160EPN+ ,CMOS, µP Compatible, 4µs, 8-Bit ADCGeneral Description
The MAX160 and MX7574 are low cost, micropro-
cessor compatible 8 bit analo ..
MAX160EWN ,Microprocessor compatible 8-bit A/D converter. Fast conversion time 4microsec. Error +-1/2 LSB.MAX160/MX75 74
pf' Compatible a Bit A/D Converter
ABSOLUTE MAXIMUM RATINGS - MAX160, MX7574
..
MAX160EWN+ ,CMOS, µP Compatible, 4µs, 8-Bit ADCFeatures
. Improved Second Source (MAX160)
. Fast Conversion Time: 405 (MAX160)
15ys (MX7574)
..
MAX1610CSE ,Digitally Controlled CCFL Backlight Power SuppliesFeaturesThe MAX1610/MAX1611 are fully integrated, high-® Direct Digital Control of CCFL Brightnesse ..
MAX4315EEE ,High-Speed / Low-Power / Single-Supply / Multichannel / Video Multiplexer-Amplifiersapplications. MAX4313EUA -40°C to +85°C 8 µMAXMAX4313ESA -40°C to +85°C 8 SO
MAX4315ESE ,High-Speed / Low-Power / Single-Supply / Multichannel / Video Multiplexer-AmplifiersApplicationsMAX4314EEE -40°C to +85°C 16 QSOPVideo Signal Multiplexing Broadcast VideoMAX4314ESD -4 ..
MAX4315ESE+T ,High-Speed, Low-Power, Single-Supply Multichannel, Video Multiplexer-AmplifiersFeaturesThe MAX4310–MAX4315 single-supply mux-amps com-♦ Single-Supply Operation Down to +4Vbine hi ..
MAX4321EUK/T ,Low-Cost / Low-Voltage / Rail-to-Rail / Input/Output / SOT23 5MHz Op AmpELECTRICAL CHARACTERISTICS(V = +5.0V, V = 0, V = 0, V = V /2, R = ∞ connected to V /2, T = +25°C, u ..
MAX4321EUK+T ,Low-Cost, Low-Voltage, Rail-to-Rail, Input/Output, SOT23 5MHz Op AmpApplicationsPin Configuration/Typical Operating CircuitFunctional Diagram+5VTOP VIEWMAX187OUT 15 VE ..
MAX4321EUK-T ,Low-Cost / Low-Voltage / Rail-to-Rail / Input/Output / SOT23 5MHz Op AmpFeaturesThe MAX4321 operational amplifier (op amp) combines Low-Voltage, Pin-for-Pin Upgrade for L ..
MAX1609EEE
Octal SMBus-to-Parallel I/O Expanders
General DescriptionThe MAX1608/MAX1609 provide remote input/output (I/O)
expansion through an SMBus™ 2-wire serial interface.
Each device has eight high-voltage open-drain outputs
that double as TTL-level logic inputs, providing continuous
bidirectional capabilities. The open-drain outputs tailor the
MAX1608/MAX1609 for use in load-switching and other
level-shifting applications as well as general-purpose I/O
applications.
Two complete sets of registers allow the device and its
outputs to be toggled between two states using the
SMBSUSinput, without the inherent latency of reprogram-
ming outputs over the serial bus. The eight I/O lines are
continuously monitored and can be used as inputs. Each
line can generate asynchronous maskable interrupts on
the falling edge, the rising edge, or both edges.
For load-switching applications, the MAX1608 is designed
to drive N-channel MOSFETs, and its outputs are low
upon power-up; the MAX1609 is designed to drive P-
channel MOSFETs, and its I/Os are high impedance upon
power-up. Other features of both devices include thermal-
overload and output-overcurrent protection, ultra-low sup-
ply current, and a wide +2.7V to +5.5V supply range. The
MAX1608/MAX1609 are available in space-saving 16-pin
QSOP packages.
ApplicationsParallel I/O Expansion
Power-Plane Switching
Notebook and Desktop Computers
Servers and Workstations
Notebook Docking Stations
Industrial Equipment
FeaturesSerial-to-Parallel or Parallel-to-Serial Conversions 8 General-Purpose Digital I/O Pins
(withstand +28V)SMBus 2-Wire Serial InterfaceSupports SMBSUSAsynchronous Suspend9 Pin-Selectable Slave AddressesOutputs High Impedance on Power-Up (MAX1609)Outputs Low on Power-Up (MAX1608)2.5µA Supply Current +2.7V to +5.5V Supply Range16-Pin QSOP Package
MAX1608/MAX1609
Octal SMBus-to-Parallel I/O Expanders19-1639; Rev 0; 1/00
Ordering Information
Typical Operating Circuits
Pin ConfigurationSMBus is a trademark of Intel Corp.
MAX1608/MAX1609
Octal SMBus-to-Parallel I/O Expanders
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(V+ = +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V+ to GND................................................................-0.3V to +6V
IO_ to GND.............................................................-0.3V to +30V
IO_ Sink Current..................................................-1mA to +50mA
SMBCLK, SMBDATA, SMBSUS
andALERTto GND.............................................-0.3V to +6V
ADD_ to GND...............................................-0.3V to (V+ + 0.3V)
SMBDATA and ALERTSink Current...................-1mA to +50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C)...........667mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX1608/MAX1609
Octal SMBus-to-Parallel I/O Expanders
TIMING CHARACTERISTICS(V+ = +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Note 1:Specifications from 0°C to -40°C are guaranteed by design, not production tested.
Note 2:For supply current, SMBus logic inputs driven to 0 or V+.
Note 3:Data hold and set-up times measured from falling edge of 9th clock.
Note 4:Must be driven to GND, V+, or floating. See SMBus Addressingsection.
Note 5:The SMBus logic block is a static design and will work with clock frequencies down to DC. While slow operation is possible,
it violates the 10kHz minimum clock frequency and SMBus specifications and may use excessive space on the bus.
Typical Operating Characteristics(V+ = +5V, TA= +25°C, unless otherwise noted.)
MAX1608/MAX1609
Octal SMBus-to-Parallel I/O Expanders
Typical Operating Characteristics (continued)(V+ = +5V, TA= +25°C, unless otherwise noted.)
MAX1608/MAX1609
Octal SMBus-to-Parallel I/O ExpandersVIO_
500mV/div
2V/div
MAX1608/9 TOC013
MAX1608
IO_ POWER-UP RESPONSE
Typical Operating Characteristics (continued)(V+ = +5V, TA= +25°C, unless otherwise noted.)
Pin Description
Detailed DescriptionThe MAX1608/MAX1609 convert 2-wire SMBus serial
data into eight latched parallel outputs (IO0–IO7). These
devices are intended for general-purpose remote I/O
expansion. Each device has eight high-voltage open-
drain outputs that double as TTL-level logic inputs.
Typical applications range from high-side MOSFET load-
switch drivers in power-management systems, to push-
button switch monitors, to general-purpose digital I/Os.
The MAX1608/MAX1609 include two complete sets of
registers, each consisting of one output data register to
set the output states and two interrupt mask registers.
The SMBSUSline selects which set of registers control
the device state. The input register is used to perform
readback of the actual IO states.
The MAX1608/MAX1609 operate from a single +2.7V
to +5.5V supply with a typical quiescent current of
2.5µA, making them ideal for portable applications.
Additionally, the devices include an ALERTfunction to
alert the master of change of condition (Figure 1).
MAX1608/MAX1609
Octal SMBus-to-Parallel I/O ExpandersFigure 1. Functional Diagram
MAX1608/MAX1609
Octal SMBus-to-Parallel I/O Expanders
SMBus Interface Operation The SMBus serial interface is a 2-wire interface with
multi-mastering capability. The MAX1608/MAX1609 are
2-wire slave-only devices and employ standard SMBus
write-byte, send-byte, read-byte, and receive-byte
protocols (Figure 2) as documented in “System
Management Bus Specification v1.08” (available at
www.sbs-forum.org). SMBDATA and SMBCLK are
Schmitt-triggered inputs that can accommodate slower
edges; however, the rising and falling edges should still
be faster than 1µs and 300ns, respectively.
Communication starts with the master signaling the
beginning of a transmission with a START condition,
which is a high-to-low transition on SMBDATA while
SMBCLK is high. When the master has finished com-
municating with the slave, it issues a STOP condition,
which is a low-to-high transition on SMBDATA while
SMBCLK is high (Figures 3 and 4). The bus is then free
for another transmission from any master on the bus.
The address byte, command byte, and data byte are
transmitted between the START and STOP conditions.
Figures 3 and 4 show the timing diagrams for signals
on the 2-wire interface. The SMBDATA state is allowed
to change only while SMBCLK is low, except for the
START and STOP conditions. Data is transmitted in 8-
bit words and is sampled on the rising edge of SMB-
CLK. Nine clock cycles are required to transfer each
byte in or out of the MAX1608/MAX1609 (Figure 2),
since either the master or the slave acknowledges
receipt of the correct byte during the ninth clock. The
IC responds to the address selected by the ADD0 and
ADD1 pins (Table 1).
If the MAX1608/MAX1609 receive the correct slave
address followed by RW= 0, the selected device
expects to receive one or two bytes of information. If
the device detects a START or STOP condition prior to
clocking in a full additional byte of data, it considers
this an error condition and disregards all of the data. If
no error occurs, the registers are updated immediately
after the falling edge of the acknowledge clock pulse
(Figure 5). If the MAX1608/MAX1609 receive the cor-
rect slave address followed by RW= 1, the selected
device expects to clock out the contents of the previ-
ously accessed register during the next byte transfer.
A third interface line (SMBSUS) is used to execute com-
mands asynchronously from previously stored registers
(seeSMBSUS(Suspend-Mode) Input section).
SMBus AddressingAfter the START condition, the master transmits a 7-bit
address followed by the RWbit (Figure 2). If the
MAX1608/MAX1609 recognizes its own address, it
sends an acknowledgment pulse by pulling SMBDATA
low.
Each slave responds to only two addresses: its own
unique address (set by ADD1 and ADD0, Table 1), and
the alert response address (0x19). The device’s unique
address is determined at power-up, with a software
sample-address-pin command (SAP), or a software
power-on-reset command (SPOR). The MAX1608/
MAX1609 address pins (ADD1–ADD0) are high imped-
ance except when ADD1–ADD0 are sampled, which
occurs during power-up and when requested (SPOR,
RAP). During sampling, the equivalent input circuit can
be described as a resistor-divider from V+ to GND
(20kΩeach), which momentarily bias the pins to mid-
supply if they are left floating. To set the ADD_ pins
high or low, connect or drive the pins to the rails (V+ or
GND) to guarantee a correct level detection. During
sampling, the pins draw a momentary input bias cur-
rent (V+ / 20kΩ). Also, stray capacitance in excess of
50pF on the ADD_ pins when floating may cause
address recognition problems.
SMBus CommandsThe 8-bit command byte (Table 2) is the master index
that points to the registers within the MAX1608/MAX1609.
The devices include ten registers: the data registers
(NDR1–NDR3, SDR1–SDR3) are accessed through
both the read-byte and write-byte protocols (Figure 2),
the RSB and MDIF registers are accessed with the
read-byte protocols, and the RAP and SPOR registers
Table 1. Slave Addresses
MAX1608/MAX1609use the send-byte protocol. The shorter receive-byte
protocol can be used instead of the read-byte protocol,
provided the correct data register was previously
selected by a read-byte or write-byte instruction. Use
caution with the shorter protocols in multimaster sys-
tems, since a second master could overwrite the com-
mand byte without informing the first master. The
register selected at POR is 0b0000 0000 so that a
receive-byte transmission that occurs immediately after
initial power-up returns the setting of NDR1. SPOR
does not reset the register pointer.
Data RegistersThe MAX1608/MAX1609 each have seven data regis-
ters, three normal registers, three suspend registers,
and one readback register. The SMBUSline deter-
mines which registers controls the output states and
the interrupt mask states (normal registers if SUSBUS=
1, suspend registers if SMBSUS= 0).
Registers 1 (NDR1 and SDR1) set the state of each of
the eight outputs to either low or high impedance.
When using an external pull-up, high impedance corre-
sponds to an output high. To use the IO_ pins as TTL
inputs only, set the corresponding bit high. The
MAX1608 powers up with all IO_ pins set low; the
MAX1609 powers up with all IO_ pins set to high
impedance (Table 3).
Register 2 (NDR2 and SDR2) are used to mask rising-
edge triggered interrupts, while Register 3 are used to
mask falling-edge triggered interrupts. On power-up, all
interrupts are masked (Tables 4 and 5).
The IO_ Status Data Register (RSB, Table 6) reads the
actual TTL-logic level of the IO_ pins. The IO_ pins are
sampled on the falling edge of the third byte’s acknowl-
edge (ACK) for a read-byte format, or on the falling
edge of the first byte’s ACK for a receive-byte protocol
(Figure 5). There is a 15µs data-setup time require-
ment, due to the slow level translators needed for high-
voltage (28V) operation. Data-hold time is 300ns. Do
not write to the RSB register because writes to read-
only registers are redirected to NDR1. SMBus sends
Octal SMBus-to-Parallel I/O ExpandersFigure 2. SMBus Protocols
