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MAX1510ETBMAXIMN/a50avaiLow-Voltage DDR Linear Regulator
MAX1510ETBMAXN/a50avaiLow-Voltage DDR Linear Regulator


MAX1510ETB ,Low-Voltage DDR Linear RegulatorFeaturesThe MAX1510 DDR linear regulator sources and sinks up Internal Power MOSFETs with Current ..
MAX1510ETB ,Low-Voltage DDR Linear RegulatorApplicationsPIN- TOPPART TEMP RANGENotebook/Desktop ComputersPACKAGE MARKDDR Memory Termination10 T ..
MAX1510ETB+ ,Low-Voltage DDR Linear RegulatorsApplicationsMAX1510ATB/V+ -40°C to +85°C 10 TDFN-EP* AWD● Notebook/Desktop ComputersMAX17510ATB+ -4 ..
MAX1510ETB+T ,Low-Voltage DDR Linear RegulatorsFeaturesThe MAX1510/MAX17510 DDR linear regulators source ● Internal Power MOSFETs with Current Lim ..
MAX1512ETA ,EEPROM-Programmable TFT VCOM CalibratorELECTRICAL CHARACTERISTICS(Circuit of Figure 1, V = 3V, V = 10V, V = 5V, R = 30.1kΩ , T = 0°C to +8 ..
MAX1512ETA+ ,EEPROM-Programmable TFT VCOM CalibratorELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, V = 3V, V = 10V, V = 5V, R = 30.1kΩ , T ..
MAX4162ESA ,SOT23 / Micropower / Single-Supply / Rail-to-Rail I/O Op AmpsELECTRICAL CHARACTERISTICS: +3V Operation (continued)(V =+3V, V = 0V, V = V / 2, V = V / 2, R tied ..
MAX4162ESA ,SOT23 / Micropower / Single-Supply / Rail-to-Rail I/O Op AmpsGeneral Description ________
MAX4162ESA+ ,SOT23, Micropower, Single-Supply, Rail-to-Rail I/O Op AmpsFeaturesThe MAX4162/MAX4163/MAX4164 are single/dual/quad, ♦ UCSP Package (MAX4163)micropower operat ..
MAX4162ESA+T ,SOT23, Micropower, Single-Supply, Rail-to-Rail I/O Op AmpsELECTRICAL CHARACTERISTICS: 3V Operation (continued)(V = 3V, V = 0V, V = V /2, V = V /2, R connecte ..
MAX4162EUK ,SOT23 / Micropower / Single-Supply / Rail-to-Rail I/O Op Ampsapplications. The singleMAX4162 is available in 8-pin SO and space-saving ______________Ordering In ..
MAX4162EUK ,SOT23 / Micropower / Single-Supply / Rail-to-Rail I/O Op AmpsApplicationsMAX4162EUK -40°C to +85°C 5 SOT23-5 AABXBattery-Powered Devices Medical InstrumentsMAX4 ..


MAX1510ETB
Low-Voltage DDR Linear Regulator
General Description
The MAX1510 DDR linear regulator sources and sinks up
to 3A peak (typ) using internal n-channel MOSFETs. This
linear regulator delivers an accurate 0.5V to 1.5V output
from a low-voltage power input (VIN= 1.1V to 3.6V). The
MAX1510 uses a separate 3.3V bias supply to power the
control circuitry and drive the internal n-channel
MOSFETs.
The MAX1510 provides current and thermal limits to
prevent damage to the linear regulator. Additionally,
the MAX1510 generates a power-good (PGOOD) signal
to indicate that the output is in regulation. During start-
up, PGOOD remains low until the output is in regulation
for 2ms (typ). The internal soft-start limits the input
surge current.
The MAX1510 powers the active-DDR termination bus
that requires a tracking input reference. The MAX1510
can also be used in low-power chipsets and graphics
processor cores that require dynamically adjustable
output voltages. The MAX1510 is available in a 10-pin
3mm x 3mm thin DFN package.
Applications

Notebook/Desktop Computers
DDR Memory Termination
Active Termination Buses
Graphics Processor Core Supplies
Chipset/RAM Supplies as Low as 0.5V
Features
Internal Power MOSFETs with Current Limit (3A typ)Fast Load-Transient ResponseExternal Reference Input with Reference
Output Buffer
1.1V to 3.6V Power Input±15mV (max) Load-Regulation ErrorThermal Fault ProtectionShutdown InputPower-Good Window Comparator with 2ms
(typ) Delay
Small, Low-Profile 10-Pin 3mm x 3mm TDFN
Package
Ceramic or Polymer Output Capacitors
MAX1510
Low-Voltage DDR Linear Regulator
Ordering Information
Typical Operating Circuit

19-3279; Rev 0; 5/04
Pin Configuration
MAX1510
Low-Voltage DDR Linear Regulator
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VIN= 1.8V, VCC= 3.3V, VREFIN= VOUTS= 1.25V, SHDN= VCC, circuit of Figure 1, TA= -40°C to +85°C, unless otherwise noted.
Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to PGND...............................................................-0.3V to +4V
OUT to PGND..............................................-0.3V to (VIN+ 0.3V)
OUTS to AGND............................................-0.3V to (VIN+ 0.3V)
VCCto AGND............................................................-0.3V to +4V
REFIN, REFOUT, SHDN, PGOOD to AGND..-0.3V to (VCC+ 0.3V)
PGND to AGND.....................................................-0.3V to +0.3V
REFOUT Short Circuit to AGND.................................Continuous
OUT Continuous RMS Current: 100s..................................±1.6A
1s......................................±2.5A
Continuous Power Dissipation (TA= +70°C)
10-Pin 3mm x 3mm Thin DFN
(derated 24.4mW/°C above +70°C)...........................1951mW
Operating Temperature Range
MAX1510ETB...................................................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX1510
Low-Voltage DDR Linear Regulator

relation using statistical-quality-control (SQC) methods.
ELECTRICAL CHARACTERISTICS (continued)

(VIN= 1.8V, VCC= 3.3V, VREFIN= VOUTS= 1.25V, SHDN= VCC, circuit of Figure 1, TA= -40°C to +85°C, unless otherwise noted.
Typical values are at TA= +25°C.) (Note 1)
MAX1510
Low-Voltage DDR Linear Regulator

OUTPUT LOAD REGULATION
MAX1510 toc01
IOUT (A)
OUT
(V)
OUTPUT LOAD REGULATION
MAX1510 toc02
IOUT (A)
OUT
(V)
MAXIMUM OUTPUT CURRENT
vs. INPUT VOLTAGE
MAX1510 toc03
INPUT VOLTAGE (V)
MAXIMUM OUTPUT CURRENT (A)
BIAS CURRENT (ICC)
vs. INPUT VOLTAGE (VIN)

MAX1510 toc05
VIN (V)
(mA)
BIAS CURRENT (ICC)
vs. LOAD CURRENT (IOUT)
MAX1510 toc06
IOUT (A)
ICC
(mA)0-1
POWER GROUND CURRENT (IPGND)
vs. SOURCE LOAD CURRENT (IOUT)
MAX1510 toc07
IOUT (A)
IPGND
(mA)
INPUT CURRENT (IIN)
vs. SINK LOAD CURRENT (IOUT)
MAX1510 toc08
IOUT (A)
ICC
(mA)
DROPOUT VOLTAGE
vs. OUTPUT CURRENT
MAX1510 toc09
OUTPUT CURRENT (A)
DROPOUT VOLTAGE (V)
Typical Operating Characteristics

(Circuit of Figure 1. TA = +25°C, unless otherwise noted)
MAX1510
Low-Voltage DDR Linear Regulator
SHUTDOWN WAVEFORM

MAX1510 toc12
100µs/div
VOUT
PGOOD
SHDN
SOURCE LOAD TRANSIENT

MAX1510 toc13
20.0µs/div
1mV/div
VOUT
AC-COUPLED
IOUT
SOURCE/SINK LOAD TRANSIENT

MAX1510 toc14
4.00µs/div
+1.5A
5mV/div
-1.5A
VOUT
AC-COUPLED
IOUT
LINE TRANSIENT

MAX1510 toc15
40µs/div
3.3V
0.9V
1.5V
VIN (1V/div)
VOUT (10mV/div)
AC-COUPLED
Typical Operating Characteristics (continued)

(Circuit of Figure 1. TA = +25°C, unless otherwise noted)
MAX1510
Low-Voltage DDR Linear Regulator
Typical Operating Characteristics (continued)

(Circuit of Figure 1. TA = +25°C, unless otherwise noted)
MAX1510
Low-Voltage DDR Linear Regulator
Detailed Description

The MAX1510 is a low-voltage, low-dropout DDR termi-
nation linear regulator with an external bias supply
input and a buffered reference output (see Figures 1
and 2). VCCis powered by a 2.7V to 3.6V supply that is
commonly available in laptop and desktop computers.
The 3.3V bias supply drives the gate of the internal
pass transistor, while a lower voltage input at the drain
of the transistor (IN) is regulated to provide VOUT. By
using separate bias and power inputs, the MAX1510
can drive an n-channel high-side MOSFET and use a
lower input voltage to provide better efficiency.
The MAX1510 regulates its output voltage to the volt-
age at REFIN. When used in DDR applications as a
termination supply, the MAX1510 delivers 1.25V or
0.9V at 3A peak (typ) from an input voltage of 1.1V to
3.6V. The MAX1510 sinks up to 3A peak (typ) as
required in a termination supply. The MAX1510 pro-
vides shoot-through protection, ensuring that the
source and sink MOSFETs do not conduct at the same
time, yet produces a fast source-to-sink load transient.
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