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MAX1448EHJMAXIMN/a206avai10-Bit, 80Msps, Single 3.0V, Low-Power ADC with Internal Reference


MAX1448EHJ ,10-Bit, 80Msps, Single 3.0V, Low-Power ADC with Internal ReferenceELECTRICAL CHARACTERISTICS(V = 3.0V, OV = 2V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to ..
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MAX1448EHJ
10-Bit, 80Msps, Single 3.0V, Low-Power ADC with Internal Reference
General Description
The MAX1448 3V, 10-bit analog-to-digital converter
(ADC) features a fully differential input, a pipelined 10-
stage ADC architecture with wideband track-and-hold
(T/H), and digital error correction incorporating a fully
differential signal path. The ADC is optimized for low-
power, high dynamic performance in imaging and digi-
tal communications applications. The converter
operates from a single 2.7V to 3.6V supply, consuming
only 120mW while delivering a 59dB (typ) signal-to-
noise ratio (SNR) at a 20MHz input frequency. The fully
differential input stage has a -3dB 400MHz bandwidth
and may be operated with single-ended inputs. In addi-
tion to low operating power, the MAX1448 features a
5µA power-down mode for idle periods.
An internal 2.048V precision bandgap reference is
used to set the ADC full-scale range. A flexible refer-
ence structure allows the user to supply a buffered,
direct, or externally derived reference for applications
requiring increased accuracy or a different input volt-
age range.
Lower speed, pin-compatible versions of the MAX1448
are also available. Refer to the MAX1444 data sheet for
a 40Msps version and to the MAX1446 data sheet for a
60Msps version.
The MAX1448 has parallel, offset binary, CMOS-com-
patible three-state outputs that can be operated from
1.7V to 3.6V to allow flexible interfacing. The device is
available in a 5mm x 5mm 32-pin TQFP package and is
specified over the extended industrial (-40°C to +85°C)
temperature range.
________________________Applications

Ultrasound Imaging
CCD Imaging
Baseband and IF Digitization
Digital Set-Top Boxes
Video Digitizing Applications
Features
Single 3.0V OperationExcellent Dynamic Performance
59dB SNR at fIN= 20MHz
74dBc SFDR at fIN= 20MHz
Low Power
40mA (Normal Operation)
5µA (Shutdown Mode)
Fully Differential Analog InputWide 2VP-PDifferential Input Voltage Range400MHz -3dB Input BandwidthOn-Chip 2.048V Precision Bandgap ReferenceCMOS-Compatible Three-State Outputs32-Pin TQFP PackageEvaluation Kit Available (MAX1448 EV Kit)
MAX1448
10-Bit, 80Msps, Single 3.0V, Low-Power
ADC with Internal Reference

CLK
IN+
CONTROL
PIPELINE ADC
REF SYSTEM +
BIAS
OUTPUT
DRIVERS
REF
REFINREFOUTREFPCOMREFNOE
VDD
GND
OVDD
OGND
D9–D0
IN-
T/H
MAX1448
Functional Diagram

19-5400; Rev 3; 9/04
EVALUATION KIT
AVAILABLE
Ordering Information
Pin Configuration appears at end of data sheet.
PARTTEMP RANGEPIN-PACKAGE

MAX1448EHJ-40°C to +85°C32 TQFP
MAX1448
10-Bit, 80Msps, Single 3.0V, Low-Power
ADC with Internal Reference
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= 3.0V, OVDD= 2V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND, VREFIN= 2.048V, REFOUT connected to
REFIN through a 10kΩresistor, VIN= 2VP-P (differential with respect to COM), CL= 10pF at digital outputs, fCLK= 83.3MHz, TA= TMIN
to TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, < +25°C guaranteed by design and characterization; typical
values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD, OVDDto GND...............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
IN+, IN- to GND........................................................-0.3V to VDD
REFIN, REFOUT, REFP,
REFN, and COM to GND..........................-0.3V to (VDD+ 0.3V)
OE, PD, CLK to GND..................................-0.3V to (VDD+ 0.3V)
D9–D0 to GND.........................................-0.3V to (OVDD+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
32-Pin TQFP (derate 18.7mW/°C above +70°C)......1495.3mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range ............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DC ACCURACY

Resolution10Bits
Integral NonlinearityINLfIN = 7.47MHz, TA ≥ +25°C±0.7±2.2LSB
Differential NonlinearityDNLfIN = 7.47M H z, no m i ssi ng cod es±0.4±1.0LSB
Offset Error<±1±1.7%FS
Gain ErrorTA ≥ +25°C0±2%FS
ANALOG INPUT

Input Differential RangeVDIFFDifferential or single-ended inputs±1.0V
Common-Mode Voltage RangeVCOMVDD/2
± 0.5V
Input ResistanceRINSwitched capacitor load25kΩ
Input CapacitanceCIN5pF
CONVERSION RATE

Maximum Clock FrequencyfCLK80MHz
Data Latency5.5Cycles
DYNAMIC CHARACTERISTICS (FCLK = 83.3MHZ, 4096-POINT FFT)

fIN = 7.47MHz56.559.1
fIN = 20MHz5659Signal-to-Noise RatioSNR
fIN = 39.9MHz (Note 1)58.5
fIN = 7.47MHz55.859
fIN = 20MHz55.358.8Signal-to-Noise + Distortion
(Up to 5th Harmonic)SINAD
fIN = 39.9MHz (Note 1)58
MAX1448
10-Bit, 80Msps, Single 3.0V, Low-Power
ADC with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.0V, OVDD= 2V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND, VREFIN= 2.048V, REFOUT connected to
REFIN through a 10kΩresistor, VIN= 2VP-P (differential with respect to COM), CL= 10pF at digital outputs, fCLK= 83.3MHz, TA= TMIN
to TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, < +25°C guaranteed by design and characterization; typical
values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

fIN = 7.47MHz6174
fIN = 20MHz6174Spurious-Free Dynamic
RangeSFDR
fIN = 39.9MHz (Note 1)73
dBc
fIN = 7.47MHz-74
fIN = 20MHz-74Third-Harmonic DistortionHD3
fIN = 39.9MHz (Note 1)-73
dBc
Intermodulation Distortion
Two-ToneIMDTTf1 = 24MHz at -6.5dB FS, f2 = 26MHz at
-6.5dB FS (Note 2)-74dBc
Third-Order Intermodulation
DistortionIM3
f1 = 24MHz at -6.5dB FS, f2 = 26MHz at
-6.5dB FS (Note 2)-74dBc
fIN = 7.47MHz-72-60
fIN = 20MHz-70-60Total Harmonic Distortion
(First 5 Harmonics)THD
fIN = 39.9MHz (Note 1)-69
dBc
Small-Signal BandwidthInput at -20dB FS, differential inputs500MHz
Full-Power BandwidthFPBWInput at -0.5dB FS, differential inputs400MHz
Aperture DelaytAD1ns
Aperture JittertAJ2psRMS
Overdrive Recovery TimeFor 1.5 × full-scale input2ns
Differential Gain±1%
Differential Phase±0.25Degrees
Output NoiseIN+ = IN- = COM0.2LSBRMS
INTERNAL REFERENCE

Reference Output VoltageREFOUT2.048
±1%V
Reference Temperature
CoefficientTCREF60ppm/°C
Load Regulation1.25mV/mA
BUFFERED EXTERNAL REFERENCE (VREFIN = 2.048V)

REFIN Input VoltageVREFIN2.048osi ti ve Refer ence O utp ut V ol tag eVREFP2.012Veg ati ve Refer ence Outp ut V ol tag eVREFN0.988V
Common-Mode LevelVCOMVDD / 2V
Differential Reference Output
Voltage Range∆VREF∆VREF = VREFP - VREFN, TA ≥ +25°C0.981.0241.07V
REFIN ResistanceRREFIN>50MΩ
Maximum REFP, COM Source
CurrentISOURCE5mA
MAX1448
10-Bit, 80Msps, Single 3.0V, Low-Power
ADC with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.0V, OVDD= 2V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND, VREFIN= 2.048V, REFOUT connected to
REFIN through a 10kΩresistor, VIN= 2VP-P (differential with respect to COM), CL= 10pF at digital outputs, fCLK= 83.3MHz, TA= TMIN
to TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, < +25°C guaranteed by design and characterization; typical
values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Maximum REFP, COM Sink
CurrentISINK-250µA
Maximum REFN Source CurrentISOURCE250µA
Maximum REFN Sink CurrentISINK-5mA
UNBUFFERED EXTERNAL REFERENCE (VREFIN = AGND, reference voltage applied to REFP, REFN, and COM )

REFP, REFN Input ResistanceRREFP,
RREFN
Measured between REFP and COM and
REFN and COM4kΩ
REFP, REFN, COM Input
CapacitanceCIN15pF
Differential Reference Input
Voltage Range∆VREF∆VREF = VREFP - VREFN1.024
± 10%V
COM Input Voltage RangeVCOMVDD / 2
± 10%V
REFP Input VoltageVREFPVCOM+
∆VREF / 2V
REFN Input VoltageVREFNVCOM -
∆VREF / 2VIGIT A L IN PU T S ( C L K, PD, OE)
CLK0.8 x
VDD
Input High ThresholdVIH
PD, OE0.8 x
OV D D
CLK0.2 x
OV DDInput Low ThresholdVIL
PD, OE0.2 x
OV DD
Input CapacitanceCIN5pF
Input HysteresisVHYST0.1V
IIHVIH = VDD = 0VDD±5Input LeakageIILVIL = 0±5µA
DIGITAL OUTPUTS (D9–D0)

Output Voltage LowVOLISINK = 200µA0.2V
Output Voltage HighVOHISOURCE = 200µAOVDD -
0.2V
Three-State Leakage CurrentILEAKOE = OVDD±10µA
Three-State Output CapacitanceCOUTOE = OVDD5pF
MAX1448
10-Bit, 80Msps, Single 3.0V, Low-Power
ADC with Internal Reference
Note 1:
SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dB FS referenced to a 1.024V full-scale
input voltage range.
Note 2:
Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB better if referenced to the two-tone envelope.
Note 3:
Digital outputs settle to VIH,VIL.
Note 4:
With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER REQUIREMENTS

Analog Supply VoltageVDD2.73.03.6V
Output Supply VoltageOVDD1.73.03.6V
Operating, fIN = 20MHz at -0.5dB FS4047mAAnalog Supply CurrentIVDDShutdown, clock idle, PD = OE = OVDD415µA
Operating, CL = 15pF, fIN = 20MHz at
-0.5dB FS8mAOutput Supply CurrentIOVDD
Shutdown, clock idle, PD = OE = OVDD120µA
Offset±0.2mV/VPower-Supply RejectionPSRRGain±0.1%/V
TIMING CHARACTERISTICS

CLK Rise to Output Data ValidtDOFigure 6 (Note 3)58ns
OE Fall to Output EnabletENABLEFigure 510ns
OE Rise to Output DisabletDISABLEFigure 515ns
CLK Pulse Width HightCHFigure 6, clock period 12ns6±1ns
CLK Pulse Width LowtCLFigure 6, clock period 12ns6±1ns
Wake-Up TimetWAKE(Note 4)1.5µs
ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.0V, OVDD= 2V, 0.1µF and 1µF capacitors from REFP, REFN, and COM to GND, VREFIN= 2.048V, REFOUT connected to
REFIN through a 10kΩresistor, VIN= 2VP-P (differential with respect to COM), CL= 10pF at digital outputs, fCLK= 83.3MHz, TA= TMIN
to TMAX, unless otherwise noted. ≥+25°C guaranteed by production test, < +25°C guaranteed by design and characterization; typical
values are at TA= +25°C.)
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