IC Phoenix
 
Home ›  MM23 > MAX1229BCEP+-MAX1229BEEP+-MAX1231BCEG,12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference
MAX1229BCEP+-MAX1229BEEP+-MAX1231BCEG Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
MAX1229BCEP+MAIXMN/a2500avai12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference
MAX1229BEEP+MAIXMN/a2500avai12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference
MAX1231BCEGMAXIMN/a1avai12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference
MAX1231BCEGMAXN/a19avai12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference


MAX1229BCEP+ ,12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal ReferenceFeaturesThe MAX1227/MAX1229/MAX1231 are serial 12-bit ana- ♦ Internal Temperature Sensor (±0.7°C Ac ..
MAX1229BEEP+ ,12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal ReferenceELECTRICAL CHARACTERISTICS(V = +2.7V to +3.6V, f = 300kHz, f = 4.8MHz (50% duty cycle), V = 2.5V, T ..
MAX122ACAG+ ,500ksps, Sampling, 12-Bit ADC with Track/Hold and ReferenceFeaturesThe MAX120/MAX122 complete, BiCMOS, sampling 12-bit ● 12-Bit Resolutionanalog-to-digital co ..
MAX122ACNG ,500ksps, 12-Bit ADCs with Track/Hold And RefrencelVI/lXI/VI 500ksps, 12-Bit ADCs with Track/Hold and Reference
MAX122ACNG+ ,500ksps, Sampling, 12-Bit ADC with Track/Hold and ReferenceApplicationsMAX120ENG+ -40°C to +85°C 24 PDIP ±1● Digital-Signal ProcessingMAX120EWG+ -40°C to +85° ..
MAX122ACNG+ ,500ksps, Sampling, 12-Bit ADC with Track/Hold and Referenceapplications requiring a serial interface, MAX120CWG+ 0°C to +70°C 24 Wide SO ±1refer to the MAX121 ..
MAX351ESE ,Precision, Quad, SPST Analog Switches
MAX351ESE+ ,Precision, Quad, SPST Analog Switches
MAX352CSE ,Precision, Quad, SPST Analog Switches
MAX352CSE ,Precision, Quad, SPST Analog Switches
MAX352CSE+ ,Precision, Quad, SPST Analog Switches
MAX352ESE+ ,Precision, Quad, SPST Analog Switches


MAX1229BCEP+-MAX1229BEEP+-MAX1231BCEG
12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference
General Description
The MAX1227/MAX1229/MAX1231 are serial 12-bit ana-
log-to-digital converters (ADCs) with an internal reference
and an internal temperature sensor. These devices fea-
ture an on-chip FIFO, scan mode, internal clock mode,
internal averaging, and AutoShutdown™. The maximum
sampling rate is 300ksps using an external clock. The
MAX1231 has 16 input channels, the MAX1229 has 12
input channels, and the MAX1227 has 8 input channels.
All input channels are configurable for single-ended or
differential inputs in unipolar or bipolar mode. All three
devices operate from a +3V supply and contain a 10MHz
SPI™-/QSPI™-/MICROWIRE™-compatible serial port.
The MAX1231 is available in 28-pin 5mm x 5mm TQFN
with exposed pad and 24-pin QSOP packages. The
MAX1227/MAX1229 are only available in QSOP pack-
ages. All three devices are specified over the extended
-40°C to +85°C temperature range.
________________________Applications

System Supervision
Data-Acquisition Systems
Industrial Control Systems
Patient Monitoring
Data Logging
Instrumentation
Features
Internal Temperature Sensor (±0.7°C Accuracy)16-Entry First-In/First-Out (FIFO)Analog Multiplexer with True Differential
Track/Hold
16-, 12-, 8-Channel Single Ended
8-, 6-, 4-Channel True Differential
(Unipolar or Bipolar)
Accuracy: ±1 LSB INL, ±1 LSB DNL, No Missing
Codes Overtemperature
Scan Mode, Internal Averaging, and Internal ClockLow-Power Single +3V Operation
1mA at 300ksps
Internal 2.5V Reference or External Differential
Reference
10MHz 3-Wire SPI-/QSPI-/MICROWIRE-Compatible
Interface
Space-Saving 28-Pin 5mm x 5mm TQFN Package
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference

AIN0
TOP VIEW
EOC
DOUT
DIN
SCLK
VDD
GND
REF+
MAX1227
QSOP

AIN1
AIN2
AIN5
AIN3
AIN4
REF-/AIN6
CNVST/AIN7
EOC
DOUT
DINAIN3
AIN2
AIN1
AIN0
SCLK
VDD
GND
REF+AIN7
AIN6
AIN5
AIN4
CNVST/AIN11
REF-/AIN10AIN9
AIN8
MAX1229
Pin Configurations

19-2851; Rev 7; 4/12
EVALUATION KIT
AVAILABLE
Ordering Information
PARTTEMP RANGEPIN-PACKAGE
MAX1227BCEE+
0°C to +70°C16 QSOP
MAX1227BEEE+-40°C to +85°C16 QSOP
MAX1229BCEP+
0°C to +70°C20 QSOP
MAX1229BEEP+-40°C to +85°C20 QSOP
Ordering Information continued at end of data sheet.

AutoShutdown is a trademark of Maxim Integrated Products, Inc.
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad (TQFN only). Connect to GND.
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= +2.7V to +3.6V, fSAMPLE= 300kHz, fSCLK= 4.8MHz (50% duty cycle), VREF= 2.5V, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
CS, SCLK, DIN, EOC, DOUT to GND.........-0.3V to (VDD+ 0.3V)
AIN0–AIN13, REF-/AIN_, CNVST/AIN_,
REF+ to GND.........................................-0.3V to (VDD+ 0.3V)
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C)...........667mW
20-Pin QSOP (derate 9.1mW/°C above +70°C)...........727mW
24-Pin QSOP (derate 9.5mW/°C above +70°C)...........762mW
28-Pin TQFN 5mm x 5mm
(derate 20.8mW/°C above +70°C)........................1667mW
Operating Temperature Ranges
MAX12__C__.......................................................0°C to +70°C
MAX12__E__....................................................-40°C to +85°C
Storage Temperature Range.............................-60°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DC ACCURACY (NOTE 1)

ResolutionRES12Bits
Integral NonlinearityINL±1.0LSB
Differential NonlinearityDNLNo missing codes over temperature±1.0LSB
Offset Error±0.5±4.0LSB
Gain Error(Note 2)±0.5±4.0LSB
Offset Error Temperature
Coefficient±2ppm/°C
FSR
Gain Temperature Coefficient±0.8ppm/°C
Channel-to-Channel Offset
Matching±0.1LSB
DYNAMIC SPECIFICATIONS (30kHz sine wave input, 2.5VP-P, 300ksps, fSCLK = 4.8MHz)

Signal-to-Noise Plus DistortionSINAD71dB
Total Harmonic DistortionTHDUp to the 5th harmonic-80dBc
Spurious-Free Dynamic RangeSFDR81dBc
Intermodulation DistortionIMDfIN1 = 29.9kHz, fIN2 = 30.2kHz76dBc
Full-Power Bandwidth-3dB point1MHz
Full-Linear BandwidthS/(N + D) > 68dB100kHz
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +2.7V to +3.6V, fSAMPLE= 300kHz, fSCLK= 4.8MHz (50% duty cycle), VREF= 2.5V, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
CONVERSION RATE

External reference0.8Power-Up TimetPUInternal reference (Note 3)65µs
Acquisition TimetACQ0.6µs
Internally clocked3.5Conversion TimetCONVExternally clocked (Note 4)2.7µs
Externally clocked conversion0.14.8External Clock FrequencyfSCLKData I/O10MHz
SCLK Duty Cycle4060%
Aperture Delay30ns
Aperture Jitter<50ps
ANALOG INPUT

Unipolar0VREFInput Voltage RangeBipolar (Note 5)- V RE F /2V RE F /2V
Input Leakage CurrentVIN = VDD±0.01±1µA
Input CapacitanceDuring acquisition time (Note 6)24pF
INTERNAL TEMPERATURE SENSOR

TA = +25°C±0.7Measurement Error (Note 7)TA = TMIN to TMAX±1.2±2.5°C
Tem p er atur e M easur em ent N oi se0.4°CRMS
Temperature Resolution1/8°C
Power-Supply Rejection0.3°C/V
INTERNAL REFERENCE

REF Output Voltage2.482.502.52V
REF Temperature CoefficientTCREF±30p p m /° C
Output Resistance6.5kΩ
REF Output Noise200µVRMS
REF Power-Supply RejectionPSRR-70dB
EXTERNAL REFERENCE INPUT

REF- Input Voltage RangeVREF-0500mV
REF+ Input Voltage RangeVREF+1.0VDD + 50mVV
VREF+ = 2.5V, fSAMPLE = 300ksps40100REF+ Input CurrentIREF+VREF+ = 2.5V, fSAMPLE = 0±0.1±5µA
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
Note 1:
Tested at VDD= +2.7V, unipolar input mode.
Note 2:
Offset nulled.
Note 3:
Time for reference to power up and settle to within 1 LSB.
Note 4:
Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 5:
The operational input voltage range for each individual input of a differentially configured pair is from GND to VDD. The
operational input voltage difference is from -VREF/2 to +VREF/2.
Note 6:
See Figure 3 (Input Equivalent Circuit) and the Typical Operating Curve in the Sampling Error vs. Source Impedancesec-
tion.
Note 7:
Fast automated test, excludes self-heating effects.
Note 8:
When CNVST is configured as a digital input, do not apply a voltage between VILand VIN.
Note 9:
Supply current is specified depending on whether an internal or external reference is used for voltage conversions.
Temperature measurements always use the internal reference.
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +2.7V to +3.6V, fSAMPLE= 300kHz, fSCLK= 4.8MHz (50% duty cycle), VREF= 2.5V, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DIGITAL INPUTS (SCLK, DIN, CS, CNVST) (Note 8)

Input Voltage LowVILVDD x 0.3V
Input Voltage HighVIHVDD x 0.7V
Input HysteresisVHYST200mV
Input Leakage CurrentIINVIN = 0 or VDD±0.01±1.0µA
Input CapacitanceCIN15pF
DIGITAL OUTPUTS (DOUT, EOC)

ISINK = 2mA0.4Output Voltage LowVOLISINK = 4mA0.8V
Output Voltage HighVOHISOURCE = 1.5mAVDD - 0.5V
Tri-State Leakage CurrentILCS = VDD±0.05±1µA
Tri-State Output CapacitanceCOUTCS = VDD15pF
POWER REQUIREMENTS

Supply VoltageVDD2.73.6V
During temp sense24002700
fSAMPLE = 300ksps17502000
fSAMPLE = 0, REF on10001200
Internal
reference
Shutdown0.25
During temp sense15502000
fSAMPLE = 300ksps10501200
Supply Current (Note 9)IDD
External
referenceShutdown0.25
Power-Supply RejectionPSRVDD = 2.7V to 3.6V; full-scale input±0.2±1mV
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Externally clocked conversion208SCLK Clock PeriodtCPData I/O100ns
SCLK Duty CycletCH4060%
SCLK Fall to DOUT TransitiontDOTCLOAD = 30pF40ns
CS Rise to DOUT DisabletDODCLOAD = 30pF40ns
CS Fall to DOUT EnabletDOECLOAD = 30pF40ns
DIN to SCLK Rise SetuptDS40ns
SCLK Rise to DIN HoldtDH0nsS Ri se- to- S C LK Ri se S etup Ti m etCSS140ns
CS Fall-to-SCLK Hold TimeTCSH00ns
CKSEL = 00, CKSEL = 01 (temp sense)40nsCNVST Pulse WidthtCSWCKSEL = 01 (voltage conversion)1.4µsT S Temp sense55
Voltage conversion7CS or CNVST Rise to EOC
Low (Note 10)
Reference power-up65
TIMING CHARACTERISTICS (Figure 1)

INTEGRAL NONLINEARITY
vs. OUTPUT CODE
MAX1227/29/31 toc01
OUTPUT CODE
INTEGRAL NONLINEARITY (LSB)
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
MAX1227/29/31 toc02
OUTPUT CODE
DIFFERENTIAL NONLINEARITY (LSB)
SINAD vs. FREQUENCY

MAX1227/29/31 toc03
FREQUENCY (kHz)
AMPLITUDE (dB)
0.11000ypical Operating Characteristics
(VDD= +3V, VREF= +2.5V, fSCLK= 4.8MHz, CLOAD= 30pF, TA= +25°C, unless otherwise noted.)
Note 10:
This time is defined as the number of clock cycles needed for conversion multiplied by the clock period. If the internal ref
erence needs to be powered up, the total time is additive. The internal reference is always used for temperature measure
ments.
INTERNAL REFERENCE VOLTAGE
vs. SUPPLY VOLTAGE
MAX1227/29/31 toc10
INTERNAL REFERENCE VOLTAGE (V)
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
SFDR vs. FREQUENCY

MAX1227/29/31 toc04
FREQUENCY (kHz)
AMPLITUDE (dB)
SUPPLY CURRENT vs. SAMPLING RATE
MAX1227/29/31 toc05
SAMPLING RATE (ksps)
SUPPLY CURRENT (
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1227/29/31 toc06
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX1227/29/31 toc07
SUPPLY VOLTAGE (V)
SHUTDOWN SUPPLY CURRENT (
SUPPLY CURRENT vs. TEMPERATURE
MAX1227/29/31 toc08
TEMPERATURE (°C)
SUPPLY CURRENT (
fS = 300ksps
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
MAX1227/29/31 toc09
SHUTDOWN SUPPLY CURRENT (
Typical Operating Characteristics (continued)

(VDD= +3V, VREF= +2.5V, fSCLK= 4.8MHz, CLOAD= 30pF, TA= +25°C, unless otherwise noted.)
MAX1227/MAX1229/MAX1231
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
MAX1227/29/31 toc11
TEMPERATURE (°C)
INTERNAL REFERENCE VOLTAGE (V)
OFFSET ERROR
vs. SUPPLY VOLTAGE
MAX1227/29/31 toc12
SUPPLY VOLTAGE (V)
OFFSET ERROR (LSB)
OFFSET ERROR
vs. TEMPERATURE
TEMPERATURE (°C)
OFFSET ERROR (LSB)
GAIN ERROR vs. SUPPLY VOLTAGE
MAX1227/29/31 toc14
SUPPLY VOLTAGE (V)
GAIN ERROR (LSB)
GAIN ERROR vs. TEMPERATURE
MAX1227/29/31 toc15
TEMPERATURE (°C)
GAIN ERROR (LSB)
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
Typical Operating Characteristics (continued)
(VDD= +3V, VREF= +2.5V, fSCLK= 4.8MHz, CLOAD= 30pF, TA= +25°C, unless otherwise noted.)
TEMPERATURE SENSOR ERROR
vs. TEMPERATURE
MAX1227/29/31 toc16
TEMPERATURE SENSOR ERROR (
GRADE B26810
SAMPLING ERROR
vs. SOURCE IMPEDANCE

MAX1227/29/31 toc17
SAMPLING ERROR (LSB)
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
Pin Description
PIN
MAX1231
TQFN-EP
MAX1231
QSOPMAX1229MAX1227
NAMEFUNCTION

2–12, 26,
27, 28,1–14——AIN0–13Analog Inputs—1–10—AIN0–9Analog Inputs——1–6AIN0–5Analog Inputs15——REF-/AIN14N eg ati ve Inp ut for E xter nal D i ffer enti al Refer ence/Anal og Inp ut 14.
See Table 3 for details on programming the setup register.—11—REF-/AIN10N eg ati ve Inp ut for E xter nal D i ffer enti al Refer ence/Anal og Inp ut 10.
See Table 3 for details on programming the setup register.——7REF-/AIN6Negative Input for External Differential Reference/Analog Input 6.
See Table 3 for details on programming the setup register.16——CNVST/
AIN15
Active-Low Conversion Start Input/Analog Input 15. See Table 3 for
details on programming the setup register.—12—CNVST/
AIN11
Active-Low Conversion Start Input/Analog Input 11. See Table 3 for
details on programming the setup register.
———8CNVST/
AIN7
Active-Low Conversion Start Input/Analog Input 7. See Table 3 for
details on programming the setup register.17139REF+Positive Reference Input. Bypass to GND with a 0.1µF capacitor.181410GNDGround191511VDDPower Input. Bypass to GND with a 0.1µF capacitor.201612SCLK
Serial Clock Input. Clocks data in and out of the serial interface.
(Duty cycle must be 40% to 60%.) See Table 3 for details on
programming the clock mode.211713CSActive-Low Chip Select Input. When CS is low, the serial interface
is enabled. When CS is high, DOUT is high impedance.221814DINSerial Data Input. DIN data is latched into the serial interface on the
rising edge of SCLK.231915DOUTSerial Data Output. Data is clocked out on the falling edge of
SCLK. High impedance when CS is connected to VDD.242016EOCEnd of Conversion Output. Data is valid after EOC pulls low.
1, 17, 19,———N.C.No Connection. Not internally connected.———EPExposed Pad (TQFN Only). Connect to GND.
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
Detailed Description

The MAX1227/MAX1229/MAX1231 are low-power, seri-
al-output, multichannel ADCs with temperature-sensing
capability for temperature-control, process-control, and
monitoring applications. These 12-bit ADCs have inter-
nal track and hold (T/H) circuitry that supports single-
ended and fully differential inputs. Data is converted
from an internal temperature sensor or analog voltage
configurations. Microprocessor (µP) control is made
easy through a 3-wire SPI-/QSPI/ MICROWIRE-compati-
ble serial interface.
Figure 2 shows a simplified functional diagram of the
MAX1227/MAX1229/MAX1231 internal architecture.
The MAX1227 has eight single-ended analog input
channels or four differential channels. The MAX1229
has 12 single-ended analog input channels or six differ-
SCLK
DIN
DOUT
tDH
tDOE
tDS
tCHtCSS0tCPtCSH1tCSH0
tCSS1
tDODtDOT
Figure 1. Detailed Serial-Interface Timing Diagram
12-BIT
SAR
ADC
CONTROL
SERIAL
INTERFACE
OSCILLATOR
FIFO AND
ACCUMULATORT/H
TEMP
SENSE
REF-
CNVST
SCLK
DIN
EOC
DOUT
AIN15
AIN1
AIN2
INTERNAL
REFERENCEREF+
MAX1227
MAX1229
MAX1231
Figure 2. Functional Diagram
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
Converter Operation

The MAX1227/MAX1229/MAX1231 ADCs use a fully dif-
ferential, successive-approximation register (SAR) con-
version technique and an on-chip T/H block to convert
temperature and voltage signals into a 12-bit digital
result. Both single-ended and differential configurations
are supported, with a unipolar signal range for single-
ended mode and bipolar or unipolar ranges for differ-
ential mode.
Input Bandwidth

The ADC’s input-tracking circuitry has a 1MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. Anti-alias prefiltering
of the input signals is necessary to avoid high-frequen-
cy signals aliasing into the frequency band of interest.
Analog Input Protection

Internal ESD protection diodes clamp all pins to VDD
and GND, allowing the inputs to swing from (GND -
0.3V) to (VDD+ 0.3V) without damage. However, for
accurate conversions near full scale, the inputs must
not exceed VDDby more than 50mV or be lower than
GND by 50mV. If an off-channel analog input voltage
exceeds the supplies, limit the input current to 2mA.
3-Wire Serial Interface

The MAX1227/MAX1229/MAX1231 feature a serial
interface compatible with SPI/QSPI and MICROWIRE
devices. For SPI/QSPI, ensure the CPU serial interface
runs in master mode so it generates the serial clock
signal. Select the SCLK frequency of 10MHz or less,
and set clock polarity (CPOL) and phase (CPHA) in the
µP control registers to the same value. The MAX1227/
MAX1229/MAX1231 operate with SCLK idling high or
low, and thus operate with CPOL = CPHA = 0 or CPOL
= CPHA = 1. Set CSlow to latch input data at DIN on
the rising edge of SCLK. Output data at DOUT is
updated on the falling edge of SCLK. Bipolar true dif-
ferential results and temperature sensor results are
available in two’s complement format, while all others
are in binary.
Serial communication always begins with an 8-bit input
data byte (MSB first) loaded from DIN. Use a second
byte, immediately following the setup byte, to write to
the unipolar mode or bipolar mode registers (see
Tables 1, 3, 4, and 5). A high-to-low transition on CSini-
tiates the data input operation. The input data byte and
the subsequent data bytes are clocked from DIN into
the serial interface on the rising edge of SCLK.
Tables 1–7 detail the register descriptions. Bits 5 and 4,
CKSEL1 and CKSEL0, respectively, control the clock
modes in the setup register (see Table 3). Choose
between four different clock modes for various ways to
start a conversion and determine whether the acquisi-
tions are internally or externally timed. Select clock
mode 00 to configure CNVST/AIN_ to act as a conver-
sion start and use it to request the programmed, inter-
nally timed conversions without tying up the serial bus.
In clock mode 01, use CNVSTto request conversions
one channel at a time, controlling the sampling speed
without tying up the serial bus. Request and start inter-
nally timed conversions through the serial interface by
writing to the conversion register in the default clock
mode 10. Use clock mode 11 with SCLK up to 4.8MHz
for externally timed acquisitions to achieve sampling
rates up to 300ksps. Clock mode 11 disables scanning
and averaging. See Figures 4–7 for timing specifica-
tions and how to begin a conversion.
These devices feature an active-low, end-of-conversion
output. EOCgoes low when the ADC completes the last-
requested operation and is waiting for the next input
data byte (for clock modes 00 and 10). In clock mode
01, EOCgoes low after the ADC completes each
requested operation. EOCgoes high when CSor CNVST
goes low. EOCis always high in clock mode 11.
Single-Ended/Differential Input

The MAX1227/MAX1229/MAX1231 use a fully differen-
tial ADC for all conversions. The analog inputs can be
configured for either differential or single-ended con-
versions by writing to the setup register (see Table 3).
Single-ended conversions are internally referenced to
GND (see Figure 3).
In differential mode, the T/H samples the difference
between two analog inputs, eliminating common-mode
DC offsets and noise. IN+ and IN- are selected from
the following pairs: AIN0/AIN1, AIN2/AIN3, AIN4/AIN5,
AIN6/AIN7, AIN8/AIN9, AIN10/AIN11, AIN12/AIN13,
and AIN14/AIN15. AIN0–AIN7 are available on the
MAX1227, MAX1229, and MAX1231. AIN8–AIN11 are
only available on the MAX1229 and MAX1231.
AIN12–AIN15 are only available on the MAX1231. See
Tables 2–5 for more details on configuring the inputs.
For the inputs that can be configured as CNVSTor an
analog input, only one can be used at a time. For the
inputs that can be configured as REF- or an analog
input, the REF- configuration excludes the analog input.
MAX1227/MAX1229/MAX1231
12-Bit 300ksps ADCs with FIFO, emp Sensor, Internal Reference
Unipolar/Bipolar

Address the unipolar and bipolar registers through the
setup register (bits 1 and 0). Program a pair of analog
channels for differential operation by writing a 1 to the
appropriate bit of the bipolar or unipolar register.
Unipolar mode sets the differential input range from 0
to VREF. A negative differential analog input in unipolar
mode causes the digital output code to be zero.
Selecting bipolar mode sets the differential input range
to ±VREF/2. The digital output code is binary in unipolar
mode and two’s complement in bipolar mode (Figures
8 and 9).
In single-ended mode, the MAX1227/MAX1229/
MAX1231 always operate in unipolar mode. The analog
inputs are internally referenced to GND with a full-scale
input range from 0 to VREF.
True Differential Analog Input T/H

The equivalent circuit of Figure 3 shows the MAX1227/
MAX1229/MAX1231s’ input architecture. In track mode,
a positive input capacitor is connected to AIN0–AIN15
in single-ended mode (and AIN0, AIN2, AIN4…AIN14
in differential mode). A negative input capacitor is con-
nected to GND in single-ended mode (or AIN1, AIN3,
AIN5…AIN15 in differential mode). For external T/H
timing, use clock mode 01. After the T/H enters hold
mode, the difference between the sampled positive
and negative input voltages is converted. The time
required for the T/H to acquire an input signal is deter-
mined by how quickly its input capacitance is charged.
If the input signal’s source impedance is high, the
required acquisition time lengthens. The acquisition
time, tACQ, is the maximum time needed for a signal to
be acquired, plus the power-up time. It is calculated by
the following equation:
where RIN= 1.5kΩ, RSis the source impedance of the
input signal, and tPWR= 1µs, the power-up time of the
device. The varying power-up times are detailed in the
explanation of the clock mode conversions.
tACQis never less than 1.4µs, and any source imped-
ance below 300Ωdoes not significantly affect the
ADC’s AC performance. A high-impedance source can
be accommodated either by lengthening tACQor by
placing a 1µF capacitor between the positive and neg-
ative analog inputs.
Internal FIFO

The MAX1227/MAX1229/MAX1231 contain a FIFO
buffer that can hold up to 16 ADC results plus one tem-
perature result. This allows the ADC to handle multiple
internally clocked conversions and a temperature mea-
surement, without tying up the serial bus.
If the FIFO is filled and further conversions are request-
ed without reading from the FIFO, the oldest ADC
results are overwritten by the new ADC results. Each
result contains 2 bytes, with the MSB preceded by four
leading zeros. After each falling edge of CS, the oldest
available byte of data is available at DOUT, MSB first.
When the FIFO is empty, DOUT is zero.
The first 2 bytes of data read out after a temperature
measurement always contain the temperature result
preceded by four leading zeros, MSB first. If another
temperature measurement is performed before the first
temperature result is read out, the old measurement is
overwritten by the new result. Temperature results are
in degrees Celsius (two’s complement) at a resolution
of 1/8 of a degree. See the Temperature Measurements
section for details on converting the digital code to a
temperature.
Internal Clock

The MAX1227/MAX1229/MAX1231 operate from an
internal oscillator, which is accurate within 10% of the
4.4MHz nominal clock rate. The internal oscillator is
active in clock modes 00, 01, and 10. Read out the
data at clock speeds up to 10MHz. See Figures
4–7 for details on timing specifications and starting a
conversion.RRxpFtACQSINPWR=++()924
HOLD
CIN+
REF
GNDDAC
CIN-
VDD/2
COMPARATOR
AIN0-AIN15
(SINGLE ENDED);
AIN0, AIN2,
AIN4…AIN14
(DIFFERENTIAL)
GND
(SINGLE ENDED);
AIN1, AIN3,
AIN5…AIN15
(DIFFERENTIAL)HOLD
HOLD
Figure 3. Equivalent Input Circuit
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED