IC Phoenix
 
Home ›  MM22 > MAX1167BCEE-MAX1168ACEG-MAX1168BEEG,Multichannel, 16-Bit, 200ksps Analog-to-Digital Converters
MAX1167BCEE-MAX1168ACEG-MAX1168BEEG Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
MAX1168ACEGMAXN/a5avaiMultichannel, 16-Bit, 200ksps Analog-to-Digital Converters
MAX1167BCEEMAXIMN/a100avaiMultichannel, 16-Bit, 200ksps Analog-to-Digital Converters
MAX1168BEEGMAXIMN/a821avaiMultichannel, 16-Bit, 200ksps Analog-to-Digital Converters


MAX1168BEEG ,Multichannel, 16-Bit, 200ksps Analog-to-Digital ConvertersApplicationsPIN- INLPART TEMP RANGEMotor ControlPACKAGE (LSB)Industrial Process ControlMAX1167ACEE ..
MAX1168BEEG+ ,Multichannel, 16-Bit, 200ksps Analog-to-Digital ConvertersFeaturesThe MAX1167/MAX1168 low-power, multichannel, 16-♦ 16-Bit Resolution, No Missing Codesbit an ..
MAX1168BEEG+ ,Multichannel, 16-Bit, 200ksps Analog-to-Digital ConvertersApplicationsPIN- INL PART TEMP RANGEMotor ControlPACKAGE (LSB)Industrial Process ControlMAX1167BCEE ..
MAX1169AEUD ,58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOPfeatures automatic power-down, an on-chip1.7MHz High-Speed Mode4MHz clock, a +4.096V internal refer ..
MAX1169BCUD ,58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOPApplicationsMAX1169AEUD* -40°C to +85°C 14 TSSOP ±2Medical Instruments MAX1169BEUD* -40°C to +85°C ..
MAX1169BCUD+ ,58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOPApplicationsMedical InstrumentsPin ConfigurationBattery-Powered Test EquipmentSolar-Powered Remote ..
MAX3486ESA+ ,3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3486ESA+T ,3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3486ESA+T ,3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3486ESA-T ,3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3488CSA ,3.3V-Powered / 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3488CSA+ ,3.3V Powered, 10Mbps and Slew-Rate Limited, True RS-485/RS-422 Transceivers


MAX1167BCEE-MAX1168ACEG-MAX1168BEEG
Multichannel, 16-Bit, 200ksps Analog-to-Digital Converters
General Description
The MAX1167/MAX1168 low-power, multichannel, 16-
bit analog-to-digital converters (ADCs) feature a suc-
cessive-approximation ADC, integrated +4.096V
reference, a reference buffer, an internal oscillator,
automatic power-down, and a high-speed SPI™/
QSPI™/MICROWIRE™-compatible interface. The
MAX1167/MAX1168 operate with a single +5V analog
supply and feature a separate digital supply, allowing
direct interfacing with +2.7V to +5.5V digital logic.
The MAX1167/MAX1168 consume only 2.9mA (AVDD=
DVDD= +5V) at 200ksps when using an external reference.
AutoShutdown™ reduces the supply current to 145µA at
10ksps and to less than 10µA at reduced sampling rates.
The MAX1167 includes a 4-channel input multiplexer, and
the MAX1168 accepts up to eight analog inputs.
In addition, digital signal processor (DSP)-initiated con-
versions are simplified with the DSP frame-sync input and
output featured in the MAX1168. The MAX1168 includes
a data-bit transfer input to select between 8-bit-wide or
16-bit-wide data-transfer modes. Both devices feature a
scan mode that converts each channel sequentially or
one channel continuously.
Excellent dynamic performance and low power, com-
bined with ease of use and an integrated reference, make
the MAX1167/MAX1168 ideal for control and data-acqui-
sition operations or for other applications with demanding
power consumption and space requirements. The
MAX1167 is available in a 16-pin QSOP package and the
MAX1168 is available in a 24-pin QSOP package. Both
devices are guaranteed over the commercial (0°C to
+70°C) and extended (-40°C to +85°C) temperature
ranges. Use the MAX1168 evaluation kit to evaluate the
MAX1168.
Applications

Motor Control
Industrial Process Control
Industrial I/O Modules
Data-Acquisition Systems
Thermocouple Measurements
Accelerometer Measurements
Features
16-Bit Resolution, ±1 LSB DNL (max)+5V Single-Supply OperationAdjustable Logic Level (+2.7V to +5.25V)Input Voltage Range: 0 to VREFInternal (+4.096V) or External (+3.8V to AVDD)
Reference
Internal Track/Hold, 4MHz Input BandwidthInternal or External ClockSPI/QSPI/MICROWIRE-Compatible Serial
Interface, MAX1168 Performs DSP-Initiated
Conversions
8-Bit-Wide or 16-Bit-Wide Data-Transfer Mode
(MAX1168 Only)
4-Channel (MAX1167) or 8-Channel (MAX1168)
Input Mux
Scan Mode Sequentially Converts Multiple
Channels or One Channel Continuously
Low Power
2.9mA at 200ksps
1.45mA at 100ksps
145µA at 10ksps
0.6µA in Full Power-Down Mode
Small Package Size
16-Pin QSOP (MAX1167)
24-Pin QSOP (MAX1168)
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
Ordering Information
Ordering Information continued at end of data sheet.

SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
AutoShutdown is a trademark of Maxim Integrated Products, Inc.Pin Configurations appear at end of data sheet.
*Future product—contact factory for availability.
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto AGND.........................................................-0.3V to +6V
DVDDto DGND.........................................................-0.3V to +6V
DGND to AGND.....................................................-0.3V to +0.3V
AIN_, REF, REFCAP to AGND..................-0.3V to (AVDD+ 0.3V)
SCLK, CS, DSEL, DSPR, DIN to DGND...................-0.3V to +6V
DOUT, DSPX, EOCto DGND...................-0.3V to (DVDD+ 0.3V)
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C)...........667mW
24-Pin QSOP (derate 9.5mW/°C above +70°C)...........762mW
Operating Temperature Ranges
MAX116_ _ CE_..................................................0°C to +70°C
MAX116_ _ EE_...............................................-40°C to +85°C
Maximum Junction Temperature.....................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS

(AVDD= DVDD= +4.75V to +5.25V, fSCLK= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external VREF
= +4.096V, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= +4.75V to +5.25V, fSCLK= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external VREF
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= +4.75V to +5.25V, fSCLK= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external VREF
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= +4.75V to +5.25V, fSCLK= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external VREF
TIMING CHARACTERISTICS (Figures 1, 2, 8, and 16)

(AVDD= DVDD= +4.75V to +5.25V, fSCLK= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external
VREF= +4.096V, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
TIMING CHARACTERISTICS (Figures 1, 2, 8, and 16)

(AVDD= +4.75V to +5.25V, DVDD= +2.7V to +5.25V, fSCLK= 4.8MHz external clock (50% duty cycle), 24 clocks/conversion
(200ksps), external VREF= +4.096V, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after full-scale range has been
calibrated.
Note 3:
Offset and reference errors nulled.
Note 4:
DC voltage applied to on channel, and a full-scale 1kHz sine wave applied to off channels.
Note 5:
Conversion time is measured from the rising edge of the 8th external SCLK pulse to EOCtransition minus tACQin 8-bit data-
transfer mode.
Note 6:
See Figures 10 and 17.
Note 7:
fSCLK= 4.8MHz, fINTCLK= 4.0MHz. Sample rate is calculated with the formula fs= n1(n2 / fSCLK+ n3 / fINTCLK)-1where: n1
= number of scans, n2= number of SCLK cycles, and n3= number of internal clock cycles (see Figures 11–14).
Note 8:
Internal reference and buffer are left on between conversions.
Note 9:
Defined as the change in the positive full scale caused by a ±5% variation in the nominal supply voltage.
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters

INL vs. CODE
MAX1167/68 toc01
CODE
INL (LSB)
DNL vs. CODE
MAX1167/68 toc02
CODE
DNL (LSB)
FFT AT fAIN = 1kHz
MAX1167/68 toc03
FREQUENCY (kHz)
AMPLITUDE (dB)
SINAD vs. FREQUENCY

MAX1167/68 toc04
FREQUENCY (kHz)
SINAD (dB)1
SFDR vs. FREQUENCY
MAX1167/68 toc05
FREQUENCY (kHz)
SFDR (dB)1
THD vs. FREQUENCY
MAX1167/68 toc06
FREQUENCY (kHz)
THD (dB)1
SUPPLY CURRENT vs. CONVERSION RATE
(EXTERNAL CLOCK)
MAX1167/68 toc07
CONVERSION RATE (ksps)
SUPPLY CURRENT (mA)
ANALOG SUPPLY CURRENT
vs. ANALOG SUPPLY VOLTAGE
(INTERNAL REFERENCE)
MAX1167/68 toc08
AVDD (V)
IAVDD
(mA)
ANALOG SUPPLY CURRENT
vs. ANALOG SUPPLY VOLTAGE
(EXTERNAL REFERENCE)
MAX1167/68 toc09
AVDD (V)
IAVDD
(mA)
Typical Operating Characteristics
(AVDD= DVDD= +5V, fSCLK= 4.8MHz, CDOUT= 30pF, external VREF= +4.096V, TA= +25°C, unless otherwise noted.)
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
DIGITAL SUPPLY CURRENT
vs. DIGITAL SUPPLY VOLTAGE

MAX1167/68 toc10
DVDD (V)
IDVDD
(mA)
POWER-DOWN SUPPLY CURRENT
vs. AVDD SUPPLY VOLTAGE
(INTERNAL REFERENCE)
MAX1167/68 toc11
AVDD (V)
DVDD
IAVDD
(mA)
POWER-DOWN SUPPLY CURRENT
vs. DVDD SUPPLY VOLTAGE
(INTERNAL REFERENCE)
MAX1167/68 toc12
DVDD (V)
IDVDD
IAVDD
(mA)
SHUTDOWN SUPPLY CURRENT
vs. AVDD SUPPLY VOLTAGE
(EXTERNAL REFERENCE)
MAX1167/68 toc13
AVDD (V)
IDVDD
IAVDD
(nA)
SHUTDOWN SUPPLY CURRENT
vs. DVDD SUPPLY VOLTAGE
(EXTERNAL REFERENCE)
MAX1167/68 toc14
DVDD (V)
IDVDD
IAVDD
(nA)
POWER-DOWN SUPPLY CURRENT
vs. TEMPERATURE (INTERNAL REFERENCE)
MAX1167/68 toc15
IDVDD
AVDD
(mA)3510-15
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE (EXTERNAL REFERENCE)
MAX1167/68 toc16
IDVDD
IAVDD
(nA)3510-15
Typical Operating Characteristics (continued)
(AVDD= DVDD= +5V, fSCLK= 4.8MHz, CDOUT= 30pF, external VREF= +4.096V, TA= +25°C, unless otherwise noted.)
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
OFFSET ERROR vs. TEMPERATURE

MAX1167/68 toc19
TEMPERATURE (°C)
OFFSET ERROR (3510-15
GAIN ERROR vs. TEMPERATURE
MAX1167/68 toc20
TEMPERATURE (°C)
GAIN ERROR (%FSR)3510-15
CHANNEL-TO-CHANNEL ISOLATION
vs. FREQUENCY
MAX1167/68 toc21
FREQUENCY (kHz)
ISOLATION (dB)604020
INTERNAL +4.096V REFERENCE VOLTAGE
vs. ANALOG SUPPLY VOLTAGE
MAX1167/68 toc22
AVDD (V)
REF
(V)
EXTERNAL REFERENCE INPUT CURRENT
vs. EXTERNAL REFERENCE VOLTAGE
MAX1167/68 toc23
VREF (V)
IREF

INTERNAL REFERENCE VOLTAGE
vs. REF LOAD
MAX1167/68 toc24
IREF (mA)
REF
(V)106842
INTERNAL CLOCK CONVERSION TIME
(8th RISING SCLK TO FALLING EOC)
MAX1167/68 toc25
NUMBER OF SCAN-MODE CONVERSIONS
CONV
(ms)765432ypical Operating Characteristics (continued)
(AVDD= DVDD= +5V, fSCLK= 4.8MHz, CDOUT= 30pF, external VREF= +4.096V, TA= +25°C, unless otherwise noted.)
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
Detailed Description
The MAX1167/MAX1168 low-power, multichannel, 16-bit
ADCs feature a successive-approximation ADC, auto-
matic power-down, integrated +4.096V reference, and a
high-speed SPI/QSPI/MICROWIRE-compatible interface.
A DSPR input and DSPX output allow the MAX1168 to
communicate with digital signal processors (DSPs) with
no external glue logic. The MAX1167/MAX1168 operate
with a single +5V analog supply and feature a separate
digital supply, allowing direct interfacing with +2.7V to
+5.5V digital logic.
Figures 3 and 4 show the functional diagrams of the
MAX1167/MAX1168, and Figures 5 and 6 show the
MAX1167/MAX1168 in a typical operating circuit. The
serial interface simplifies communication with micro-
processors (µPs).
In external reference mode, the MAX1167/MAX1168
have two power modes: normal mode and shutdown
mode. Driving CShigh places the MAX1167/MAX1168 in
shutdown mode, reducing the supply current to 0.6µA
(typ). Pull CSlow to place the MAX1167/MAX1168 in
normal operating mode. The internal reference mode
offers software-programmable, power-down options as
shown in Table 5.
In SPI/QSPI/MICROWIRE mode, a falling edge on CS
wakes the analog circuitry and allows SCLK to clock in
data. Acquisition and conversion are initiated by SCLK.
The conversion result is available at DOUT in unipolar
serial format. DOUT is held low until data becomes
available (MSB first) on the 8th falling edge of SCLK
when in 8-bit transfer mode, and on the 16th falling
edge when in 16-bit transfer mode (see the Operating
Modessection). Figure 8 shows the detailed SPI/QSPI/
MICROWIRE serial-interface timing diagram.
In external clock mode, the MAX1168 also interfaces
with DSPs. In DSP mode, a frame-sync pulse from the
DSP initiates a conversion that is driven by SCLK. The
MAX1168 formats a frame-sync pulse to notify the DSP
that the conversion results are available at DOUT in
MSB-first, unipolar, serial-data format. Figure 16 shows
the detailed DSP serial-interface timing diagram (see the
Operating Modessection).
Analog Input

Figure 7 illustrates the input-sampling architecture of
the ADC. The voltage applied at REF or the internal
+4.096V reference sets the full-scale input voltage.
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
Pin Description (continued)

Figure 1. Load Circuits for DOUT Enable Time and SCLK-to-
DOUT Delay Time
Figure 2. Load Circuits for DOUT Disable Time
MAX1167/MAX1168
Track/Hold (T/H)

In track mode, the analog signal is acquired on the
internal hold capacitor. In hold mode, the T/H switches
open and the capacitive digital-to-analog converter
(DAC) samples the analog input.
During the acquisition, the analog input (AIN_) charges
capacitor CDAC. At the end of the acquisition interval
the T/H switches open. The retained charge on CDAC
represents a sample of the input.
In hold mode, the capacitive DAC adjusts during the
remainder of the conversion cycle to restore node
ZERO to zero within the limits of 16-bit resolution. At the
end of the conversion, force CS high and then low to
reset the T/H switches back to track mode (AIN_),
where CDACcharges to the input signal again.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens and more time must be
allowed between conversions. The acquisition time
(tACQ) is the maximum time the device takes to acquire
the signal. Use the following formula to calculate acqui-
sition time:
tACQ= 11(RS+ RIN+ RDS(ON)) ✕45pF + 0.3µs
where RIN= 340Ω, RS= the input signal’s source
impedance, RDS(ON)= 60Ω, and tACQis never less
than 729ns. A source impedance of less than 200Ω
does not significantly affect the ADC’s performance.
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
The MAX1168 features a 16-bit-wide data-transfer
mode that includes a longer acquisition time (11.5
clock cycles). Longer acquisition times are useful in
applications with input source resistances greater than
1kΩ. Noise increases when using large source resis-
tances. To improve the input signal bandwidth under
AC conditions, drive AIN_ with a wideband buffer
(>10MHz) that can drive the ADC’s input capacitance
and settle quickly.
Input Bandwidth

The ADC’s input-tracking circuitry has a 4MHz small-
signal bandwidth, making possible the digitization of
high-speed transient events and the measurement of
periodic signals with bandwidths exceeding the ADC’s
sampling rate by using undersampling techniques. To
avoid aliasing of unwanted, high-frequency signals into
the frequency band of interest, use anti-alias filtering.
Analog Input Protection

Internal protection diodes, which clamp the analog
input to AVDDor AGND, allow the input to swing from
(AGND - 0.3V) to (AVDD+ 0.3V) without damaging the
device. If the analog input exceeds 300mV beyond the
supplies, limit the input current to 10mA.
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
MAX1167/MAX1168
Digital Interface

The MAX1167/MAX1168 feature an SPI/QSPI/
MICROWIRE-compatible, 3-wire serial interface. The
MAX1167 digital interface consists of digital inputs CS,
SCLK, and DIN and outputs DOUT and EOC. The
MAX1167 operates in the following modes:SPI interface with external clockSPI interface with internal clockSPI interface with internal clock and scan mode
In addition to the standard 3-wire serial interface modes,
the MAX1168 includes a DSPR input and a DSPX output
for communicating with DSPs in external clock mode and
a DSEL input to determine 8-bit-wide or 16-bit-wide data-
transfer mode. When not using the MAX1168 in the DSP
interface mode, connect DSPR to DVDDand leave DSPX
unconnected.
Command/Configuration/Control Register

Table 1 shows the contents of the command/configura-
tion/control register and the state of each bit after initial
power-up. Tables 2–6 define the control and configuration
of the device for each bit. Cycling the power supplies
resets the command/configuration/control register to the
power-on-reset default state.
Initialization After Power-Up

A logic high on CSplaces the MAX1167/MAX1168 in
the shutdown mode chosen by the power-down bits,
and places DOUT in a high-impedance state. Drive CS
low to power up and enable the MAX1167/MAX1168
before starting a conversion. In internal reference
mode, allow 5ms for the shutdown internal reference
and/or buffer to wake and stabilize before starting a
conversion. In external reference mode (or if the inter-
nal reference is already on), no reference settling time
is needed after power-up.
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
Table 3. MAX1167 Scan Mode, Internal
Clock Only
Table 5. Power-Down Modes
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED