IC Phoenix
 
Home ›  MM22 > MAX1132BCAP-MAX1132BEAP-MAX1133BCAP-MAX1133BEAP,16-Bit ADC, 200ksps, 5V Single-Supply with Reference
MAX1132BCAP-MAX1132BEAP-MAX1133BCAP-MAX1133BEAP Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
MAX1132BCAPMAXIMN/a10avai16-Bit ADC, 200ksps, 5V Single-Supply with Reference
MAX1132BEAPMAXIMN/a100avai16-Bit ADC, 200ksps, 5V Single-Supply with Reference
MAX1133BCAPMAXIMN/a100avai16-Bit ADC, 200ksps, 5V Single-Supply with Reference
MAX1133BEAPMAXIMN/a50avai16-Bit ADC, 200ksps, 5V Single-Supply with Reference


MAX1132BEAP ,16-Bit ADC, 200ksps, 5V Single-Supply with ReferenceApplicationsOrdering Information continued at end of data sheet.Industrial Process ControlIndustria ..
MAX1132BEAP+ ,16-Bit ADC, 200ksps, 5V Single-Supply with ReferenceApplicationsOrdering Information continued at end of data sheet.Industrial Process ControlIndustria ..
MAX1132BEAP+ ,16-Bit ADC, 200ksps, 5V Single-Supply with ReferenceELECTRICAL CHARACTERISTICS(AV = DV = +5V ±5%, f = 4.8MHz, external clock (50% duty cycle), 24 clock ..
MAX1133BCAP ,16-Bit ADC, 200ksps, 5V Single-Supply with ReferenceELECTRICAL CHARACTERISTICS(AV = DV = +5V ±5%, f = 4.8MHz, external clock (50% duty cycle), 24 clock ..
MAX1133BCAP+ ,16-Bit ADC, 200ksps, 5V Single-Supply with ReferenceFeaturesThe MAX1132/MAX1133 are 200ksps, 16-bit ADCs.♦ 200ksps (Bipolar) and 150ksps (Unipolar) The ..
MAX1133BCAP+ ,16-Bit ADC, 200ksps, 5V Single-Supply with Referenceapplications. The MAX1132 accepts input signals of 0to +12V (unipolar) or ±12V (bipolar), while the ..
MAX3483CPA ,3.3V-Powered / 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3483CPA+ ,3.3V Powered, 10Mbps and Slew-Rate Limited, True RS-485/RS-422 Transceivers
MAX3483CSA ,3.3V-Powered / 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3483CSA ,3.3V-Powered / 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3483CSA ,3.3V-Powered / 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3483CSA+ ,3.3V Powered, 10Mbps and Slew-Rate Limited, True RS-485/RS-422 Transceivers


MAX1132BCAP-MAX1132BEAP-MAX1133BCAP-MAX1133BEAP
16-Bit ADC, 200ksps, 5V Single-Supply with Reference
General Description
The MAX1132/MAX1133 are 200ksps, 16-bit ADCs.
These serially interfaced ADCs connect directly to
SPI™, QSPI™, and MICROWIRE™ devices without
external logic. They combine an input scaling network,
internal track/hold, clock, a +4.096V reference, and
three general-purpose digital output pins (for external
multiplexer or PGA control) in a 20-pin SSOP package.
The excellent dynamic performance (SINAD ≥85dB),
high-speed (200ksps), and low power (7.5mA) of these
ADCs, make them ideal for applications such as indus-
trial process control, instrumentation, and medical
applications. The MAX1132 accepts input signals of 0
to +12V (unipolar) or ±12V (bipolar), while the
MAX1133 accepts input signals of 0 to +4.096V (unipo-
lar) or ±4.096V (bipolar). Operating from a single
+4.75V to +5.25V analog supply and a +4.75V to
+5.25V digital supply, power-down modes reduce
current consumption to 1mA at 10ksps and further
reduce supply current to less than 20µA at slower data
rates. A serial strobe output (SSTRB) allows direct con-
nection to the TMS320 family of digital signal proces-
sors. The MAX1132/MAX1133 user can select either the
internal clock, or an external serial-interface clock for
the ADC to perform analog-to-digital conversions.
The MAX1132/MAX1133 feature internal calibration cir-
cuitry to correct linearity and offset errors. On-demand
calibration allows the user to optimize performance.
Three user-programmable logic outputs are provided
for the control of an 8-channel mux or a PGA.
Applications

Industrial Process Control
Industrial I/O Modules
Data-Acquisition Systems
Medical Instruments
Portable and Battery-Powered Equipment
Features
200ksps (Bipolar) and 150ksps (Unipolar)
Sampling ADC
16-Bits, No Missing Codes1.5LSB INL Guaranteed85dB (min) SINAD +5V Single-Supply OperationLow-Power Operation, 7.5mA (Unipolar Mode)2.5µA Shutdown ModeSoftware-Configurable Unipolar and Bipolar Input
Ranges
0 to +12V and ±12V (MAX1132)
0 to +4.096V and ±4.096V (MAX1133)
Internal or External Reference
Internal or External ClockSPI/QSPI/MICROWIRE-Compatible Serial Interface Three User-Programmable Logic Outputs Small 20-Pin SSOP Package
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
Pin Configuration

19-2083; Rev 0; 8/01
Ordering Information
Functional Diagram appears at end of data sheet.
Typical Application Circuit appears at end of data sheet.

SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto AGND, DVDDto DGND.............................-0.3V to +6V
AGND to DGND.....................................................-0.3V to +0.3V
AIN to AGND.....................................................................±16.5V
REFADJ, CREF, REF to AGND.................-0.3V to (AVDD+ 0.3V)
Digital Inputs to DGND.............................................-0.3V to +6V
Digital Outputs to DGND.........................-0.3V to (DVDD+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
20-Pin SSOP (derate 8.00mW/°C above +70°C).........640mW
Operating Temperature Ranges
MAX113_CAP......................................................0°C to +70°C
MAX113_EAP....................................................-40°C to +85°C
Storage Temperature Range.............................-60°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS

(AVDD= DVDD= +5V ±5%, fSCLK= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
VREF= +4.096V, VREFADJ= AVDD, CREF= 2.2µF, CCREF= 1µF, TA = TMINto TMAX, unless otherwise noted. Typical values are at
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= +5V ±5%, fSCLK= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
VREF= +4.096V, VREFADJ= AVDD, CREF= 2.2µF, CCREF= 1µF, TA = TMINto TMAX, unless otherwise noted. Typical values are at
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= +5V ±5%, fSCLK= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
VREF= +4.096V, VREFADJ= AVDD, CREF= 2.2µF, CCREF= 1µF, TA = TMINto TMAX, unless otherwise noted. Typical values are at
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
Note 1:
Tested at AVDD = DVDD = +5V, bipolar input mode.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and offset
error have been nulled.
Note 3:
Offset nulled.
Note 4:
Conversion time is defined as the number of clock cycles multiplied by the clock period, clock has 50% duty cycle.
Includes the acquisition time.
Note 5:
ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Note 6:
When an external reference has a different voltage than the specified typical value, the full scale of the ADC will scale
proportionally.
Note 7:
Electrical characteristics are guaranteed from AVDD(MIN)= DVDD(MIN)to AVDD(MAX)= DVDD(MAX). For operations beyond
this range, see the Typical Operating Characteristics. For guaranteed specifications beyond the limits, contact the factory.
Note 8:
Defined as the change in positive full scale caused by a ±5% variation in the nominal supply voltage.
TIMING CHARACTERISTICS (Figures 5 and 6)
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
Typical Operating Characteristics

(MAX1132/MAX1133: AVDD= DVDD= +5V , fSCLK= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps),
bipolar input, external REF = +4.096V, 0.22µF bypassing on REFADJ, 2.2µF on REF, 1µF on CREF, TA= 25°C, unless otherwise noted.)
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
Typical Operating Characteristics (continued)

(MAX1132/MAX1133: AVDD= DVDD= +5V , fSCLK= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps),
bipolar input, external REF = +4.096V, 0.22µF bypassing on REFADJ, 2.2µF on REF, 1µF on CREF, TA= 25°C, unless otherwise noted.)
MAX1132/MAX1133
Detailed Description

The MAX1132/MAX1133 analog-to-digital converters
(ADCs) use a successive-approximation technique and
input track/hold (T/H) circuitry to convert an analog sig-
nal to a 16-bit digital output. The MAX1132/MAX1133
easily interfaces to microprocessors (µPs). The data
bits can be read either during the conversion in exter-
nal clock mode or after the conversion in internal clock
mode.
In addition to a 16-bit ADC, the MAX1132/MAX1133
include an input scaler, an internal digital microcon-
troller, calibration circuitry, an internal clock generator,
and an internal bandgap reference. The input scaler for
the MAX1132 enables conversion of input signals rang-
ing from 0 to +12V (unipolar input) or ±12V (bipolar
input). The MAX1133 accepts 0 to +4.096V (unipolar
input) or ±4.096V (bipolar input). Input range selection
is software controlled.
Calibration

To minimize linearity, offset, and gain errors, the
MAX1132/MAX1133 have on-demand software calibra-
tion. Initiate calibration by writing a Control-Byte with bit
M1 = 0, and bit M0 = 1 (see Table 1). Select internal or
external clock for calibration by setting the INT/EXTbit
in the Control Byte. Calibrate the MAX1132/MAX1133
with the clock used for performing conversions.
Offsets resulting from synchronous noise (such as the
conversion clock) are canceled by the MAX1132/
MAX1133’s calibration circuitry. However, because the
magnitude of the offset produced by a synchronous
signal depends on the signal’s shape, recalibration
may be appropriate if the shape or relative timing of the
clock or other digital signals change, as might occur if
more than one clock signal or frequency is used.
Input Scaler

The MAX1132/MAX1133 have an input scaler which
allows conversion of true bipolar input voltages while
operating from a single +5V supply. The input scaler
attenuates and shifts the input as necessary to map the
external input range to the input range of the internal
DAC. The MAX1132 analog input range is 0 to +12V
(unipolar) or ±12V (bipolar). The MAX1133 analog input
range is 0 to +4.096V (unipolar) or ±4.096V (bipolar).
Unipolar and bipolar mode selection is configured with
bit 6 of the serial Control Byte.
Figure 1 shows the equivalent input circuit of the
MAX1132/MAX1133. The resistor network on the analog
input provides ±16.5V fault protection. This circuit limits
the current going into or out of the pin to less than 2mA.
The overvoltage protection is active, even if the device
is in a power-down mode, or if AVDD= 0.
Digital Interface

The digital interface pins consist of SHDN, RST, SSTRB,
DOUT, SCLK, DIN and CS. Bringing SHDNlow, places
the MAX1132/MAX1133 in its 2.5µA shutdown mode. A
logic low on RSThalts the MAX1132/MAX1133 opera-
tion and returns the part to its power-on reset state.
In external clock mode, SSTRB is is low and pulses
high for one clock cycle at the start of conversion. In
internal clock mode, SSTRB goes low at the start of the
conversion and goes high to indicate the conversion is
finished.
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
The DIN input accepts Control Byte data which is
clocked in on each rising edge of SCLK. After CSgoes
low or after a conversion or calibration completes, the
first logic “1” clocked into DIN is interpreted as the
START bit, the MSB of the 8-bit Control Byte.
The SCLK input is the serial data transfer clock which
clocks data in and out of the MAX1132/MAX1133.
SCLK also drives the A/D conversion steps in external
clock mode (see Internal and External Clock Modes
section).
DOUT is the serial output of the conversion result.
DOUT is updated on the falling edge of SCLK. DOUT is
high-impedance when CSis high.must be low for the MAX1132/MAX1133 to accept a
Control Byte. The serial interface is disabled when CS
is high.
User-Programmable Outputs

The MAX1132/MAX1133 have three user-programma-
ble outputs, P0, P1 and P2. The power-on default state
for the programmable outputs is zero. These are push-
pull CMOS outputs suitable for driving a multiplexer, a
PGA, or other signal preconditioning circuitry. The user-
programmable outputs are controlled by bits 0, 1, and
2 of the Control Byte (Table 2).
The user-programmable outputs are set to zero during
power-on reset (POR) or when RSTgoes low. During
hardware or software shutdown P0, P1, and P2 are
unchanged and remain low-impedance.
Starting a Conversion

Start a conversion by clocking a Control Byte into the
device’s internal shift register. With CSlow, each rising
edge on SCLK clocks a bit from DIN into the
MAX1132/MAX1133’s internal shift register. After CS
goes low or after a conversion or calibration completes,
the first arriving logic “1” is defined as the start bit of
the Control Byte. Until this first start bit arrives, any
number of logic “0” bits can be clocked into DIN with
no effect. If at any time during acquisition or conversion,is brought high and then low again, the part is
placed into a state where it can recognize a new start
bit. If a new start bit occurs before the current conver-
sion is complete, the conversion is aborted and a new
acquisition is initiated.
Internal and External Clock Modes

The MAX1132/MAX1133 may use either the external
serial clock or the internal clock to perform the succes-
sive-approximation conversion. In both clock modes,
the external clock shifts data in and out of the
MAX1132/MAX1133. Bit 5 (INT/EXT) of the Control Byte
programs the clock mode.
External Clock

In external clock mode, the external clock not only
shifts data in and out, but it also drives the ADC con-
version steps. In short acquisition mode, SSTRB pulses
high for one clock period after the seventh falling edge
of SCLK following the start bit. The MSB of the conver-
sion is available at DOUT on the eighth falling edge of
SCLK (Figure 2).
In long acquisition mode, when using external clock,
SSTRB pulses high for one clock period after the fif-
teenth falling edge of SCLK following the start bit. The
MSB of the conversion is available at DOUT on the six-
teenth falling edge of SCLK (Figure 3).
In external clock mode, SSTRB is high-impedance
when CSis high. In external clock mode, CSis normally
held low during the entire conversion. If CSgoes high
during the conversion, SCLK is ignored until CSgoes
low. This allows external clock mode to be used with 8-
bit bytes.
Internal Clock

In internal clock mode, the MAX1132/MAX1133 gener-
ates its own conversion clock. This frees the micro-
processor from the burden of running the SAR conver-
sion clock, and allows the conversion results to be read
back at the processor’s convenience, at any clock rate
up to 8MHz.
SSTRB goes low at the start of the conversion and goes
high when the conversion is complete. SSTRB will be
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED