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M74HC7266M1R
QUAD EXCLUSIVE NOR GATE
1/9July 2001 HIGH SPEED:
tPD = 9ns (TYP .) at VCC = 6V LOW POWER DISSIPATION:
ICC = 1μA(MAX.) at TA=25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: PLH ≅ t PHL WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 7266
DESCRIPTIONThe M74HC7266 is an high speed CMOS QUAD
EXCLUSIVE OR GATE fabricated with silicon
gate C2 MOS technology
The M74HC7266 has an output buffer which is
CMOS structure.
Input and Output ensure high noise immunity and
stable outputs.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC7266QUAD EXCLUSIVE NOR GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC72662/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC72663/9
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
M74HC72664/9
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
M74HC72665/9
WAVEFORM 1: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
