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M74HC240
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
1/10July 2001 HIGH SPEED:
tPD = 10ns (TYP.) at VCC = 6V LOW POWER DISSIPATION:
ICC = 4μA(MAX.) at TA=25°C HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS: PLH ≅ t PHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 240
DESCRIPTIONThe M74HC240 is an advanced high-speed
CMOS OCTAL BUS BUFFER (3-STATE)
fabricated with silicon gate C2 MOS technology.
G control input governs four BUS BUFFERs.
This device is designed to be used with 3 state
memory address drivers, etc.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC240OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (INVERTED)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC2402/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
Z : High Impedance
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC2403/10
DC SPECIFICATIONS
M74HC2404/10
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)
M74HC2405/10
TEST CIRCUIT CL = 50pF/150pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
M74HC2406/10
WAVEFORM 2 :OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
